| リビジョン | afc13335a5d94e9b704d853a0ad65154b7af0a6e (tree) |
|---|---|
| 日時 | 2022-07-26 02:02:04 |
| 作者 | Stephan Gerhold <stephan@gerh...> |
| コミッター | Tom Rini |
arm: dts: db410c/db820c: Fix SPMI addresses
The Qualcomm device trees in U-Boot are currently not consistent with
the upstream DTs used in the Linux kernel. While some bindings are
similar to the official specification in the Linux kernel, several
nodes have subtle differences, e.g. the "compatible"s or the exact
specification of memory registers.
This means that some of the Qualcomm-related U-Boot drivers are not
compatible with the Linux DT (and vice versa).
The SPMI node is one such example: the "core" region starts at
0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at
0x0200f800. The end result is normally the same, since the Linux SPMI
driver simply adds the 0x800 internally.
However, commit f5a2d6b4b03a ("spmi: msm: add arbiter version 5
support") imported this behavior into the U-Boot driver, without
adjusting the DB410c/DB820c device trees. This means that the 0x800
offset is now added twice, breaking all SPMI read/write operations:
While the mistake is strictly speaking in the spmi-msm driver, fix the
issue by making the SPMI nodes in the DB410c/DB820c consistent with the
upstream Linux DT instead.
Ideally we should even go a step further by fixing the remaining uses
of custom bindings in the U-Boot drivers and moving to using the Linux
DTs as-is. This would likely avoid such mistakes in the future and
would also make the porting process much easier.
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
arch/arm/dts/dragonboard410c.dts (diff) arch/arm/dts/dragonboard820c.dts (diff)| @@ -137,9 +137,14 @@ | ||
| 137 | 137 | }; |
| 138 | 138 | }; |
| 139 | 139 | |
| 140 | - spmi@200f000 { | |
| 140 | + spmi_bus: spmi@200f000 { | |
| 141 | 141 | compatible = "qcom,spmi-pmic-arb"; |
| 142 | - reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; | |
| 142 | + reg = <0x0200f000 0x001000>, | |
| 143 | + <0x02400000 0x400000>, | |
| 144 | + <0x02c00000 0x400000>, | |
| 145 | + <0x03800000 0x200000>, | |
| 146 | + <0x0200a000 0x002100>; | |
| 147 | + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; | |
| 143 | 148 | #address-cells = <0x1>; |
| 144 | 149 | #size-cells = <0x1>; |
| 145 | 150 | pmic0: pm8916@0 { |
| @@ -93,11 +93,14 @@ | ||
| 93 | 93 | clock-frequency = <200000000>; |
| 94 | 94 | }; |
| 95 | 95 | |
| 96 | - spmi@400f000 { | |
| 96 | + spmi_bus: spmi@400f000 { | |
| 97 | 97 | compatible = "qcom,spmi-pmic-arb"; |
| 98 | - reg = <0x400f800 0x200>, | |
| 99 | - <0x4400000 0x400000>, | |
| 100 | - <0x4c00000 0x400000>; | |
| 98 | + reg = <0x0400f000 0x1000>, | |
| 99 | + <0x04400000 0x800000>, | |
| 100 | + <0x04c00000 0x800000>, | |
| 101 | + <0x05800000 0x200000>, | |
| 102 | + <0x0400a000 0x002100>; | |
| 103 | + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; | |
| 101 | 104 | #address-cells = <0x1>; |
| 102 | 105 | #size-cells = <0x1>; |
| 103 | 106 |
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