リビジョン | eac943fddb5cf3ad3d740762e3d3d0fa804ce572 (tree) |
---|---|
日時 | 2020-02-24 23:09:50 |
作者 | Philippe Mathieu-Daudé <philmd@redh...> |
コミッター | Yoshinori Sato |
hw/registerfields.h: Add 8bit and 16bit register macros
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190607091116.49044-11-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
@@ -22,6 +22,14 @@ | ||
22 | 22 | enum { A_ ## reg = (addr) }; \ |
23 | 23 | enum { R_ ## reg = (addr) / 4 }; |
24 | 24 | |
25 | +#define REG8(reg, addr) \ | |
26 | + enum { A_ ## reg = (addr) }; \ | |
27 | + enum { R_ ## reg = (addr) }; | |
28 | + | |
29 | +#define REG16(reg, addr) \ | |
30 | + enum { A_ ## reg = (addr) }; \ | |
31 | + enum { R_ ## reg = (addr) / 2 }; | |
32 | + | |
25 | 33 | /* Define SHIFT, LENGTH and MASK constants for a field within a register */ |
26 | 34 | |
27 | 35 | /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH |
@@ -34,6 +42,12 @@ | ||
34 | 42 | MAKE_64BIT_MASK(shift, length)}; |
35 | 43 | |
36 | 44 | /* Extract a field from a register */ |
45 | +#define FIELD_EX8(storage, reg, field) \ | |
46 | + extract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \ | |
47 | + R_ ## reg ## _ ## field ## _LENGTH) | |
48 | +#define FIELD_EX16(storage, reg, field) \ | |
49 | + extract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \ | |
50 | + R_ ## reg ## _ ## field ## _LENGTH) | |
37 | 51 | #define FIELD_EX32(storage, reg, field) \ |
38 | 52 | extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ |
39 | 53 | R_ ## reg ## _ ## field ## _LENGTH) |
@@ -49,6 +63,22 @@ | ||
49 | 63 | * Assigning values larger then the target field will result in |
50 | 64 | * compilation warnings. |
51 | 65 | */ |
66 | +#define FIELD_DP8(storage, reg, field, val) ({ \ | |
67 | + struct { \ | |
68 | + unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ | |
69 | + } v = { .v = val }; \ | |
70 | + uint8_t d; \ | |
71 | + d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ | |
72 | + R_ ## reg ## _ ## field ## _LENGTH, v.v); \ | |
73 | + d; }) | |
74 | +#define FIELD_DP16(storage, reg, field, val) ({ \ | |
75 | + struct { \ | |
76 | + unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ | |
77 | + } v = { .v = val }; \ | |
78 | + uint16_t d; \ | |
79 | + d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ | |
80 | + R_ ## reg ## _ ## field ## _LENGTH, v.v); \ | |
81 | + d; }) | |
52 | 82 | #define FIELD_DP32(storage, reg, field, val) ({ \ |
53 | 83 | struct { \ |
54 | 84 | unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ |
@@ -57,7 +87,7 @@ | ||
57 | 87 | d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \ |
58 | 88 | R_ ## reg ## _ ## field ## _LENGTH, v.v); \ |
59 | 89 | d; }) |
60 | -#define FIELD_DP64(storage, reg, field, val) ({ \ | |
90 | +#define FIELD_DP64(storage, reg, field, val) ({ \ | |
61 | 91 | struct { \ |
62 | 92 | unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \ |
63 | 93 | } v = { .v = val }; \ |