リビジョン | 84d3cc69512389f8cd31c2e84e77b6b77de9f503 (tree) |
---|---|
日時 | 2020-02-24 23:09:50 |
作者 | Richard Henderson <richard.henderson@lina...> |
コミッター | Yoshinori Sato |
target/rx: Disassemble rx_index_addr into a string
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20190607091116.49044-19-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
@@ -107,49 +107,42 @@ static const char psw[] = { | ||
107 | 107 | 'i', 'u', 0, 0, 0, 0, 0, 0, |
108 | 108 | }; |
109 | 109 | |
110 | -static uint32_t rx_index_addr(int ld, int size, DisasContext *ctx) | |
110 | +static void rx_index_addr(DisasContext *ctx, char out[8], int ld, int mi) | |
111 | 111 | { |
112 | - bfd_byte buf[2]; | |
112 | + uint32_t addr = ctx->addr; | |
113 | + uint8_t buf[2]; | |
114 | + uint16_t dsp; | |
115 | + | |
113 | 116 | switch (ld) { |
114 | 117 | case 0: |
115 | - return 0; | |
118 | + /* No index; return empty string. */ | |
119 | + out[0] = '\0'; | |
120 | + return; | |
116 | 121 | case 1: |
117 | - ctx->dis->read_memory_func(ctx->addr, buf, 1, ctx->dis); | |
118 | 122 | ctx->addr += 1; |
119 | - return ((uint8_t)buf[0]) << size; | |
123 | + ctx->dis->read_memory_func(addr, buf, 1, ctx->dis); | |
124 | + dsp = buf[0]; | |
125 | + break; | |
120 | 126 | case 2: |
121 | - ctx->dis->read_memory_func(ctx->addr, buf, 2, ctx->dis); | |
122 | 127 | ctx->addr += 2; |
123 | - return lduw_le_p(buf) << size; | |
128 | + ctx->dis->read_memory_func(addr, buf, 2, ctx->dis); | |
129 | + dsp = lduw_le_p(buf); | |
130 | + break; | |
131 | + default: | |
132 | + g_assert_not_reached(); | |
124 | 133 | } |
125 | - g_assert_not_reached(); | |
134 | + | |
135 | + sprintf(out, "%u", dsp << (mi < 3 ? mi : 4 - mi)); | |
126 | 136 | } |
127 | 137 | |
128 | 138 | static void operand(DisasContext *ctx, int ld, int mi, int rs, int rd) |
129 | 139 | { |
130 | - int dsp; | |
131 | 140 | static const char sizes[][4] = {".b", ".w", ".l", ".uw", ".ub"}; |
141 | + char dsp[8]; | |
142 | + | |
132 | 143 | if (ld < 3) { |
133 | - switch (mi) { | |
134 | - case 4: | |
135 | - /* dsp[rs].ub */ | |
136 | - dsp = rx_index_addr(ld, RX_MEMORY_BYTE, ctx); | |
137 | - break; | |
138 | - case 3: | |
139 | - /* dsp[rs].uw */ | |
140 | - dsp = rx_index_addr(ld, RX_MEMORY_WORD, ctx); | |
141 | - break; | |
142 | - default: | |
143 | - /* dsp[rs].b */ | |
144 | - /* dsp[rs].w */ | |
145 | - /* dsp[rs].l */ | |
146 | - dsp = rx_index_addr(ld, mi, ctx); | |
147 | - break; | |
148 | - } | |
149 | - if (dsp > 0) { | |
150 | - prt("%d", dsp); | |
151 | - } | |
152 | - prt("[r%d]%s", rs, sizes[mi]); | |
144 | + rx_index_addr(ctx, dsp, ld, mi); | |
145 | + prt("%s[r%d]%s", dsp, rs, sizes[mi]); | |
153 | 146 | } else { |
154 | 147 | prt("r%d", rs); |
155 | 148 | } |
@@ -235,7 +228,7 @@ static bool trans_MOV_ra(DisasContext *ctx, arg_MOV_ra *a) | ||
235 | 228 | /* mov.[bwl] rs,rd */ |
236 | 229 | static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a) |
237 | 230 | { |
238 | - int dsp; | |
231 | + char dspd[8], dsps[8]; | |
239 | 232 | |
240 | 233 | prt("mov.%c\t", size[a->sz]); |
241 | 234 | if (a->lds == 3 && a->ldd == 3) { |
@@ -244,29 +237,15 @@ static bool trans_MOV_mm(DisasContext *ctx, arg_MOV_mm *a) | ||
244 | 237 | return true; |
245 | 238 | } |
246 | 239 | if (a->lds == 3) { |
247 | - prt("r%d, ", a->rd); | |
248 | - dsp = rx_index_addr(a->ldd, a->sz, ctx); | |
249 | - if (dsp > 0) { | |
250 | - prt("%d", dsp); | |
251 | - } | |
252 | - prt("[r%d]", a->rs); | |
240 | + rx_index_addr(ctx, dspd, a->ldd, a->sz); | |
241 | + prt("r%d, %s[r%d]", a->rs, dspd, a->rd); | |
253 | 242 | } else if (a->ldd == 3) { |
254 | - dsp = rx_index_addr(a->lds, a->sz, ctx); | |
255 | - if (dsp > 0) { | |
256 | - prt("%d", dsp); | |
257 | - } | |
258 | - prt("[r%d], r%d", a->rs, a->rd); | |
243 | + rx_index_addr(ctx, dsps, a->lds, a->sz); | |
244 | + prt("%s[r%d], r%d", dsps, a->rs, a->rd); | |
259 | 245 | } else { |
260 | - dsp = rx_index_addr(a->lds, a->sz, ctx); | |
261 | - if (dsp > 0) { | |
262 | - prt("%d", dsp); | |
263 | - } | |
264 | - prt("[r%d], ", a->rs); | |
265 | - dsp = rx_index_addr(a->ldd, a->sz, ctx); | |
266 | - if (dsp > 0) { | |
267 | - prt("%d", dsp); | |
268 | - } | |
269 | - prt("[r%d]", a->rd); | |
246 | + rx_index_addr(ctx, dsps, a->lds, a->sz); | |
247 | + rx_index_addr(ctx, dspd, a->ldd, a->sz); | |
248 | + prt("%s[r%d], %s[r%d]", dsps, a->rs, dspd, a->rd); | |
270 | 249 | } |
271 | 250 | return true; |
272 | 251 | } |
@@ -357,12 +336,10 @@ static bool trans_PUSH_r(DisasContext *ctx, arg_PUSH_r *a) | ||
357 | 336 | /* push dsp[rs] */ |
358 | 337 | static bool trans_PUSH_m(DisasContext *ctx, arg_PUSH_m *a) |
359 | 338 | { |
360 | - prt("push\t"); | |
361 | - int dsp = rx_index_addr(a->ld, a->sz, ctx); | |
362 | - if (dsp > 0) { | |
363 | - prt("%d", dsp); | |
364 | - } | |
365 | - prt("[r%d]", a->rs); | |
339 | + char dsp[8]; | |
340 | + | |
341 | + rx_index_addr(ctx, dsp, a->ld, a->sz); | |
342 | + prt("push\t%s[r%d]", dsp, a->rs); | |
366 | 343 | return true; |
367 | 344 | } |
368 | 345 |
@@ -389,17 +366,13 @@ static bool trans_XCHG_rr(DisasContext *ctx, arg_XCHG_rr *a) | ||
389 | 366 | /* xchg dsp[rs].<mi>,rd */ |
390 | 367 | static bool trans_XCHG_mr(DisasContext *ctx, arg_XCHG_mr *a) |
391 | 368 | { |
392 | - int dsp; | |
393 | 369 | static const char msize[][4] = { |
394 | 370 | "b", "w", "l", "ub", "uw", |
395 | 371 | }; |
372 | + char dsp[8]; | |
396 | 373 | |
397 | - prt("xchg\t"); | |
398 | - dsp = rx_index_addr(a->ld, a->mi, ctx); | |
399 | - if (dsp > 0) { | |
400 | - prt("%d", dsp); | |
401 | - } | |
402 | - prt("[r%d].%s, r%d", a->rs, msize[a->mi], a->rd); | |
374 | + rx_index_addr(ctx, dsp, a->ld, a->mi); | |
375 | + prt("xchg\t%s[r%d].%s, r%d", dsp, a->rs, msize[a->mi], a->rd); | |
403 | 376 | return true; |
404 | 377 | } |
405 | 378 |
@@ -552,13 +525,10 @@ static bool trans_ADC_rr(DisasContext *ctx, arg_ADC_rr *a) | ||
552 | 525 | /* adc dsp[rs], rd */ |
553 | 526 | static bool trans_ADC_mr(DisasContext *ctx, arg_ADC_mr *a) |
554 | 527 | { |
555 | - int dsp; | |
556 | - prt("adc\t"); | |
557 | - dsp = rx_index_addr(a->ld, 2, ctx); | |
558 | - if (dsp > 0) { | |
559 | - prt("%d", dsp); | |
560 | - } | |
561 | - prt("[r%d], r%d", a->rs, a->rd); | |
528 | + char dsp[8]; | |
529 | + | |
530 | + rx_index_addr(ctx, dsp, a->ld, 2); | |
531 | + prt("adc\t%s[r%d], r%d", dsp, a->rs, a->rd); | |
562 | 532 | return true; |
563 | 533 | } |
564 | 534 |
@@ -1217,25 +1187,17 @@ static bool trans_ITOF(DisasContext *ctx, arg_ITOF *a) | ||
1217 | 1187 | |
1218 | 1188 | #define BOP_IM(name, reg) \ |
1219 | 1189 | do { \ |
1220 | - int dsp; \ | |
1221 | - prt("b%s\t#%d, ", #name, a->imm); \ | |
1222 | - dsp = rx_index_addr(a->ld, RX_MEMORY_BYTE, ctx); \ | |
1223 | - if (dsp > 0) { \ | |
1224 | - prt("%d", dsp); \ | |
1225 | - } \ | |
1226 | - prt("[r%d]", reg); \ | |
1190 | + char dsp[8]; \ | |
1191 | + rx_index_addr(ctx, dsp, a->ld, RX_MEMORY_BYTE); \ | |
1192 | + prt("b%s\t#%d, %s[r%d]", #name, a->imm, dsp, reg); \ | |
1227 | 1193 | return true; \ |
1228 | 1194 | } while (0) |
1229 | 1195 | |
1230 | 1196 | #define BOP_RM(name) \ |
1231 | 1197 | do { \ |
1232 | - int dsp; \ | |
1233 | - prt("b%s\tr%d, ", #name, a->rd); \ | |
1234 | - dsp = rx_index_addr(a->ld, RX_MEMORY_BYTE, ctx); \ | |
1235 | - if (dsp > 0) { \ | |
1236 | - prt("%d", dsp); \ | |
1237 | - } \ | |
1238 | - prt("[r%d]", a->rs); \ | |
1198 | + char dsp[8]; \ | |
1199 | + rx_index_addr(ctx, dsp, a->ld, RX_MEMORY_BYTE); \ | |
1200 | + prt("b%s\tr%d, %s[r%d]", #name, a->rd, dsp, a->rs); \ | |
1239 | 1201 | return true; \ |
1240 | 1202 | } while (0) |
1241 | 1203 |
@@ -1346,12 +1308,10 @@ static bool trans_BNOT_ir(DisasContext *ctx, arg_BNOT_ir *a) | ||
1346 | 1308 | /* bmcond #imm, dsp[rd] */ |
1347 | 1309 | static bool trans_BMCnd_im(DisasContext *ctx, arg_BMCnd_im *a) |
1348 | 1310 | { |
1349 | - int dsp = rx_index_addr(a->ld, RX_MEMORY_BYTE, ctx); | |
1350 | - prt("bm%s\t#%d, ", cond[a->cd], a->imm); | |
1351 | - if (dsp > 0) { | |
1352 | - prt("%d", dsp); | |
1353 | - } | |
1354 | - prt("[%d]", a->rd); | |
1311 | + char dsp[8]; | |
1312 | + | |
1313 | + rx_index_addr(ctx, dsp, a->ld, RX_MEMORY_BYTE); | |
1314 | + prt("bm%s\t#%d, %s[r%d]", cond[a->cd], a->imm, dsp, a->rd); | |
1355 | 1315 | return true; |
1356 | 1316 | } |
1357 | 1317 |
@@ -1443,16 +1403,12 @@ static bool trans_WAIT(DisasContext *ctx, arg_WAIT *a) | ||
1443 | 1403 | /* sccnd.[bwl] dsp:[rd] */ |
1444 | 1404 | static bool trans_SCCnd(DisasContext *ctx, arg_SCCnd *a) |
1445 | 1405 | { |
1446 | - int dsp; | |
1447 | - prt("sc%s.%c\t", cond[a->cd], size[a->sz]); | |
1448 | 1406 | if (a->ld < 3) { |
1449 | - dsp = rx_index_addr(a->sz, a->ld, ctx); | |
1450 | - if (dsp > 0) { | |
1451 | - prt("%d", dsp); | |
1452 | - } | |
1453 | - prt("[r%d]", a->rd); | |
1407 | + char dsp[8]; | |
1408 | + rx_index_addr(ctx, dsp, a->sz, a->ld); | |
1409 | + prt("sc%s.%c\t%s[r%d]", cond[a->cd], size[a->sz], dsp, a->rd); | |
1454 | 1410 | } else { |
1455 | - prt("r%d", a->rd); | |
1411 | + prt("sc%s.%c\tr%d", cond[a->cd], size[a->sz], a->rd); | |
1456 | 1412 | } |
1457 | 1413 | return true; |
1458 | 1414 | } |