リビジョン | 037c13c5904f5fc67bb0ab7dd91ae07347aedee9 (tree) |
---|---|
日時 | 2018-12-13 23:41:24 |
作者 | Richard Henderson <richard.henderson@lina...> |
コミッター | Peter Maydell |
target/arm: Implement the ARMv8.1-HPD extension
Since the TCR_*.HPD bits were RES0 in ARMv8.0, we can simply
interpret the bits as if ARMv8.1-HPD is present without checking.
We will need a slightly different check for hpd for aarch32.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181203203839.757-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
@@ -324,6 +324,10 @@ static void aarch64_max_initfn(Object *obj) | ||
324 | 324 | t = FIELD_DP64(t, ID_AA64PFR0, ADVSIMD, 1); |
325 | 325 | cpu->isar.id_aa64pfr0 = t; |
326 | 326 | |
327 | + t = cpu->isar.id_aa64mmfr1; | |
328 | + t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */ | |
329 | + cpu->isar.id_aa64mmfr1 = t; | |
330 | + | |
327 | 331 | /* Replicate the same data to the 32-bit id registers. */ |
328 | 332 | u = cpu->isar.id_isar5; |
329 | 333 | u = FIELD_DP32(u, ID_ISAR5, AES, 2); /* AES + PMULL */ |
@@ -9636,6 +9636,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, | ||
9636 | 9636 | bool ttbr1_valid = true; |
9637 | 9637 | uint64_t descaddrmask; |
9638 | 9638 | bool aarch64 = arm_el_is_aa64(env, el); |
9639 | + bool hpd = false; | |
9639 | 9640 | |
9640 | 9641 | /* TODO: |
9641 | 9642 | * This code does not handle the different format TCR for VTCR_EL2. |
@@ -9750,6 +9751,13 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, | ||
9750 | 9751 | if (tg == 2) { /* 16KB pages */ |
9751 | 9752 | stride = 11; |
9752 | 9753 | } |
9754 | + if (aarch64) { | |
9755 | + if (el > 1) { | |
9756 | + hpd = extract64(tcr->raw_tcr, 24, 1); | |
9757 | + } else { | |
9758 | + hpd = extract64(tcr->raw_tcr, 41, 1); | |
9759 | + } | |
9760 | + } | |
9753 | 9761 | } else { |
9754 | 9762 | /* We should only be here if TTBR1 is valid */ |
9755 | 9763 | assert(ttbr1_valid); |
@@ -9765,6 +9773,9 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, | ||
9765 | 9773 | if (tg == 1) { /* 16KB pages */ |
9766 | 9774 | stride = 11; |
9767 | 9775 | } |
9776 | + if (aarch64) { | |
9777 | + hpd = extract64(tcr->raw_tcr, 42, 1); | |
9778 | + } | |
9768 | 9779 | } |
9769 | 9780 | |
9770 | 9781 | /* Here we should have set up all the parameters for the translation: |
@@ -9858,7 +9869,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, | ||
9858 | 9869 | descaddr = descriptor & descaddrmask; |
9859 | 9870 | |
9860 | 9871 | if ((descriptor & 2) && (level < 3)) { |
9861 | - /* Table entry. The top five bits are attributes which may | |
9872 | + /* Table entry. The top five bits are attributes which may | |
9862 | 9873 | * propagate down through lower levels of the table (and |
9863 | 9874 | * which are all arranged so that 0 means "no effect", so |
9864 | 9875 | * we can gather them up by ORing in the bits at each level). |
@@ -9883,15 +9894,17 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, | ||
9883 | 9894 | break; |
9884 | 9895 | } |
9885 | 9896 | /* Merge in attributes from table descriptors */ |
9886 | - attrs |= extract32(tableattrs, 0, 2) << 11; /* XN, PXN */ | |
9887 | - attrs |= extract32(tableattrs, 3, 1) << 5; /* APTable[1] => AP[2] */ | |
9897 | + attrs |= nstable << 3; /* NS */ | |
9898 | + if (hpd) { | |
9899 | + /* HPD disables all the table attributes except NSTable. */ | |
9900 | + break; | |
9901 | + } | |
9902 | + attrs |= extract32(tableattrs, 0, 2) << 11; /* XN, PXN */ | |
9888 | 9903 | /* The sense of AP[1] vs APTable[0] is reversed, as APTable[0] == 1 |
9889 | 9904 | * means "force PL1 access only", which means forcing AP[1] to 0. |
9890 | 9905 | */ |
9891 | - if (extract32(tableattrs, 2, 1)) { | |
9892 | - attrs &= ~(1 << 4); | |
9893 | - } | |
9894 | - attrs |= nstable << 3; /* NS */ | |
9906 | + attrs &= ~(extract32(tableattrs, 2, 1) << 4); /* !APT[0] => AP[1] */ | |
9907 | + attrs |= extract32(tableattrs, 3, 1) << 5; /* APT[1] => AP[2] */ | |
9895 | 9908 | break; |
9896 | 9909 | } |
9897 | 9910 | /* Here descaddr is the final physical address, and attributes |