コミット: 3d739910f83f10f081de6f7586fb5932a51f499b - gcc (git)

コミットメタ情報

• リビジョン: 3d739910f83f10f081de6f7586fb5932a51f499b (tree)
• 日時: 2022-11-28 15:53:18
• 作者: Yoshinori Sato <yo-satoh@sios...>
• コミッター: Yoshinori Sato

ログメッセージ

wip: RX fdpic.

Signed-off-by: Yoshinori Sato <[e-mail]>

変更サマリ

• modified: gcc/config/rx/rx-protos.h
• modified: gcc/config/rx/rx.cc
• modified: gcc/config/rx/rx.h
• modified: gcc/config/rx/rx.md
• modified: gcc/config/rx/rx.opt

差分

--- a/gcc/config/rx/rx-protos.h
+++ b/gcc/config/rx/rx-protos.h
@@ -174,5 +174,6 @@ rx_find_use_of_reg (rtx reg, rtx_insn* insn, F stepfunc)
 bool nonpic_symbol_mentioned_p (rtx x);
 rtx legitimize_pic_address (rtx orig,
 			    machine_mode mode ATTRIBUTE_UNUSED, rtx reg);
+rtx rx_get_fdpic_reg_initial_val (void);
 
 #endif /* GCC_RX_PROTOS_H */

--- a/gcc/config/rx/rx.cc
+++ b/gcc/config/rx/rx.cc
@@ -171,12 +171,33 @@ rx_legitimize_address (rtx x,
 rtx
 legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED, rtx reg)
 {
-  if (GET_CODE (orig) == LABEL_REF || GET_CODE (orig) == SYMBOL_REF)
+  if (flag_plt && (GET_CODE (orig) == LABEL_REF ||
+		   (GET_CODE (orig) == SYMBOL_REF &&
+		    !SYMBOL_REF_LOCAL_P (orig))))
     {
       if (reg == NULL_RTX)
        reg = gen_reg_rtx (Pmode);
 
-      emit_insn (gen_symGOTOFF2reg (reg, orig));
+      if (TARGET_FDPIC
+	  && GET_CODE (orig) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (orig))
+	{
+	  /* Weak functions may be NULL which doesn't work with
+	     GOTOFFFUNCDESC because the runtime offset is not known.  */
+	  if (SYMBOL_REF_WEAK (orig))
+	    emit_insn (gen_symGOTFUNCDESC2reg (reg, orig));
+	  else
+	    emit_insn (gen_symGOTOFFFUNCDESC2reg (reg, orig));
+	}
+      else if (TARGET_FDPIC
+	       && (GET_CODE (orig) == LABEL_REF
+		   || (GET_CODE (orig) == SYMBOL_REF && SYMBOL_REF_DECL (orig)
+		       && (TREE_READONLY (SYMBOL_REF_DECL (orig))
+			   || SYMBOL_REF_EXTERNAL_P (orig)
+			   || DECL_SECTION_NAME(SYMBOL_REF_DECL (orig))))))
+	/* In FDPIC, GOTOFF can only be used for writable data.  */
+	emit_insn (gen_symGOT2reg (reg, orig));
+      else
+	emit_insn (gen_symGOTOFF2reg (reg, orig));
       crtl->uses_pic_offset_table = 1;
       return reg;
     }
@@ -185,7 +206,11 @@ legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED, rtx reg)
       if (reg == NULL_RTX)
        reg = gen_reg_rtx (Pmode);
 
-      emit_insn (gen_symGOT2reg (reg, orig));
+      if (TARGET_FDPIC &&
+	  SYMBOL_REF_FUNCTION_P (orig) && SYMBOL_REF_EXTERNAL_P(orig))
+	emit_insn (gen_symGOTFUNCDESC2reg (reg, orig));
+      else
+	emit_insn (gen_symGOT2reg (reg, orig));
       crtl->uses_pic_offset_table = 1;
       return reg;
     }
@@ -318,9 +343,9 @@ nonpic_symbol_mentioned_p (rtx x)
       && (XINT (x, 1) == UNSPEC_PIC
 	  || XINT (x, 1) == UNSPEC_GOT
 	  || XINT (x, 1) == UNSPEC_GOTOFF
-	  || XINT (x, 1) == UNSPEC_GOTPLT
 	  || XINT (x, 1) == UNSPEC_PLT
-	  || XINT (x, 1) == UNSPEC_PCREL))
+	  || XINT (x, 1) == UNSPEC_GOTFUNCDESC
+	  || XINT (x, 1) == UNSPEC_GOTOFFFUNCDESC))
     return false;
 
   const char* fmt = GET_RTX_FORMAT (GET_CODE (x));
@@ -530,12 +555,24 @@ rx_print_operand_address (FILE * file, machine_mode /*mode*/, rtx addr)
     case UNSPEC:
       {
 	int post = XINT (addr, 1);
+	const char *attr = NULL;
 	addr = XVECEXP (addr, 0, 0);
 	switch (post)
 	  {
-	  case UNSPEC_GOTOFF:
+#define ATTR_STR(_name) \
+  case UNSPEC_##_name: \
+    attr = #_name; \
+    break;
+          ATTR_STR(GOT)
+          ATTR_STR(GOTOFF)
+          ATTR_STR(GOTFUNCDESC)
+          ATTR_STR(GOTOFFFUNCDESC)
+	  }
+	if (attr)
+	  {
+  	    fprintf (file, "#");
 	    output_addr_const (file, addr);
-	    fprintf (file, "@GOTOFF");
+	    fprintf(file, "@%s", attr);
 	    return;
 	  }
       }
@@ -1927,7 +1964,7 @@ rx_expand_prologue (void)
 	gen_safe_add (stack_pointer_rtx, frame_pointer_rtx, NULL_RTX,
 		      false /* False because the epilogue will use the FP not the SP.  */);
     }
-  if (crtl->uses_pic_offset_table)
+  if (crtl->uses_pic_offset_table && !TARGET_FDPIC)
     {
       emit_insn (gen_loadGOT (gen_rtx_REG (SImode, PIC_REG)));
     }
@@ -2933,6 +2970,13 @@ rx_option_override (void)
   if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
     flag_strict_volatile_bitfields = 1;
 
+  /* FDPIC code is a special form of PIC, and the vast majority of code
+     generation constraints that apply to PIC also apply to FDPIC, so we
+     set flag_pic to avoid the need to check TARGET_FDPIC everywhere
+     flag_pic is checked. */
+  if (TARGET_FDPIC && !flag_pic)
+    flag_pic = 2;
+
   rx_override_options_after_change ();
 
   /* These values are bytes, not log.  */
@@ -3042,7 +3086,10 @@ rx_is_legitimate_constant (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
 	case UNSPEC:
 	  return XINT (x, 1) == UNSPEC_CONST ||
 		 XINT (x, 1) == UNSPEC_PID_ADDR ||
+		 XINT (x, 1) == UNSPEC_GOT ||
 		 XINT (x, 1) == UNSPEC_GOTOFF ||
+		 XINT (x, 1) == UNSPEC_GOTFUNCDESC ||
+		 XINT (x, 1) == UNSPEC_GOTOFFFUNCDESC ||
 		 XINT (x, 1) == UNSPEC_PLT;
 
 	default:
@@ -3745,6 +3792,36 @@ int rx_legitimate_pic_operand_p(rtx x)
 	       || ! nonpic_symbol_mentioned_p (get_pool_constant (x)))));
 }
 
+/* Emit insns to load the function address from FUNCDESC (an FDPIC
+   function descriptor) into r2 and the GOT address into r13,
+   returning an rtx for r2.  */
+
+rtx
+rx_load_function_descriptor (rtx funcdesc)
+{
+  rtx r2 = gen_rtx_REG (Pmode, R2_REG);
+  rtx pic_reg = gen_rtx_REG (Pmode, PIC_REG);
+  rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+  rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+
+  emit_move_insn (r2, fnaddr);
+  /* The ABI requires the entry point address to be loaded first, so
+     prevent the load from being moved after that of the GOT
+     address.  */
+  emit_insn (gen_blockage ());
+  emit_move_insn (pic_reg, gotaddr);
+  return r2;
+}
+
+/* Return an rtx holding the initial value of the FDPIC register (the
+   FDPIC pointer passed in from the caller).  */
+
+rtx
+rx_get_fdpic_reg_initial_val (void)
+{
+  return get_hard_reg_initial_val (Pmode, PIC_REG);
+}
+
 
 #undef  TARGET_NARROW_VOLATILE_BITFIELD
 #define TARGET_NARROW_VOLATILE_BITFIELD		rx_narrow_volatile_bitfield

--- a/gcc/config/rx/rx.h
+++ b/gcc/config/rx/rx.h
@@ -72,6 +72,12 @@
 	builtin_define ("__RX_ALLOW_STRING_INSNS__"); \
       else					\
 	builtin_define ("__RX_DISALLOW_STRING_INSNS__");\
+						\
+      if (TARGET_FDPIC)				\
+	{					\
+	  builtin_define ("__FDPIC__");		\
+	  builtin_define ("__RX_FDPIC__");	\
+	}					\
     }                                           \
   while (0)
 
@@ -106,6 +112,7 @@
 %{mint-register=*} \
 %{mgcc-abi:-mgcc-abi} %{!mgcc-abi:-mrx-abi} \
 %{mcpu=*} \
+%{mfdpic:--fdpic} \
 "
 
 #undef  LIB_SPEC

--- a/gcc/config/rx/rx.md
+++ b/gcc/config/rx/rx.md
@@ -35,6 +35,8 @@
 (define_constants
   [
    (SP_REG 0)
+   (R2_REG 2)
+   (PIC_REG		   13)
    (CC_REG 		   16)
 
    (UNSPEC_LOW_REG         0)
@@ -80,10 +82,8 @@
    (UNSPEC_GOT		   61)
    (UNSPEC_GOTOFF	   62)
    (UNSPEC_PLT		   63)
-   (UNSPEC_GOTPLT	   64)
-   (UNSPEC_PCREL	   65)
-   (UNSPEC_SYMOFF          66)
-   (UNSPEC_PCREL_SYMOFF    67)
+   (UNSPEC_GOTFUNCDESC     64)
+   (UNSPEC_GOTOFFFUNCDESC  65)
 
    (CTRLREG_PSW		    0)
    (CTRLREG_PC		    1)
@@ -94,8 +94,6 @@
    (CTRLREG_ISP		   10)
    (CTRLREG_FINTV	   11)
    (CTRLREG_INTB	   12)
-
-   (PIC_REG		   13)
 ]
 )
 
@@ -441,10 +439,22 @@
   {
     rtx dest = XEXP (operands[0], 0);
 
-    if (! rx_call_operand (dest, Pmode))
-      dest = force_reg (Pmode, dest);
-    emit_call_insn (gen_call_internal (dest));
-    DONE;
+  if (flag_pic &&
+      (GET_CODE (dest) == SYMBOL_REF) && (!SYMBOL_REF_LOCAL_P (dest)))
+    {
+      if (flag_plt)
+        emit_call_insn (gen_call_internal_plt (dest));
+      else
+        emit_call_insn (gen_call_internal_got (dest));
+      DONE;
+    }
+  else
+    {
+      if (! rx_call_operand (dest, Pmode))
+        dest = force_reg (Pmode, dest);
+      emit_call_insn (gen_call_internal (dest));
+      DONE;
+    }
   }
 )
 
@@ -536,9 +546,23 @@
     (return)])]
   ""
   {
-    if (MEM_P (operands[1]))
-      operands[1] = XEXP (operands[1], 0);
-    emit_call_insn (gen_sibcall_value_internal (operands[0], operands[1]));
+    if (flag_pic &&
+        (GET_CODE (operands[1]) == SYMBOL_REF) &&
+	(!SYMBOL_REF_LOCAL_P (operands[1])))
+      {
+        if (flag_plt)
+          emit_call_insn (gen_sibcall_value_internal_plt (operands[0],
+	                                                  operands[1]));
+        else
+          emit_call_insn (gen_sibcall_value_internal_got (operands[0],
+	                                                  operands[1]));
+      }
+    else
+      {
+        if (MEM_P (operands[1]))
+          operands[1] = XEXP (operands[1], 0);
+        emit_call_insn (gen_sibcall_value_internal (operands[0], operands[1]));
+      }
     DONE;
   }
 )
@@ -2906,8 +2930,15 @@
   [(match_operand 0 "" "") (match_operand 1 "" "")]
   ""
 {
-  gen_sym2GOT (operands[1]);
+  rtx gotsym = gen_sym2GOT (operands[1]);
+  PUT_MODE (gotsym, Pmode);
+  rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
 
+  if (TARGET_FDPIC)
+      emit_move_insn (picreg, rx_get_fdpic_reg_initial_val ());
+  emit_move_insn (operands[0],
+                  gen_rtx_MEM(Pmode,
+                              gen_rtx_PLUS(Pmode, picreg, gotsym)));
   DONE;
 })
 
@@ -2920,28 +2951,51 @@
   [(match_operand 0 "" "") (match_operand 1 "" "")]
   ""
 {
-  rtx gotoffsym;
-  rtx t = (!can_create_pseudo_p ()
-          ? operands[0]
-          : gen_reg_rtx (GET_MODE (operands[0])));
-
   rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
 
-  gotoffsym = gen_sym2GOTOFF (operands[1]);
-  emit_insn (gen_mov_from_got(t, picreg, gotoffsym));
-  emit_move_insn (operands[0], t);
-  //emit_insn(gen_mov_from_rirb(operands[0], picreg));
-//  set_unique_reg_note (insn, REG_EQUAL, operands[1]);
+  rtx gotoffsym = gen_sym2GOTOFF (operands[1]);
+  emit_move_insn (operands[0],
+                  gen_rtx_MEM(Pmode,
+                              gen_rtx_PLUS(Pmode, picreg, gotoffsym)));
   DONE;
 })
 
-(define_insn "mov_from_got"
-  [(match_operand 0 "register_operand" "r")
-        (match_operand 1 "register_operand" "r")
-        (match_operand 2 "" "g")]
-  ""
-  "mov.l\t%A2[%1],%0"
-)
+(define_expand "sym2GOTFUNCDESC"
+  [(const (unspec [(match_operand 0)] UNSPEC_GOTFUNCDESC))]
+  "TARGET_FDPIC")
+
+(define_expand "symGOTFUNCDESC2reg"
+  [(match_operand 0) (match_operand 1)]
+  "TARGET_FDPIC"
+{
+  rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
+  rtx gotsym = gen_sym2GOTFUNCDESC (operands[1]);
+  PUT_MODE (gotsym, Pmode);
+  emit_move_insn (operands[0],
+                  gen_rtx_MEM(Pmode,
+                              gen_rtx_PLUS(Pmode, picreg, gotsym)));
+  DONE;
+})
+
+(define_expand "sym2GOTOFFFUNCDESC"
+  [(const (unspec [(match_operand 0)] UNSPEC_GOTOFFFUNCDESC))]
+  "TARGET_FDPIC")
+
+(define_expand "symGOTOFFFUNCDESC2reg"
+  [(match_operand 0) (match_operand 1)]
+  "TARGET_FDPIC"
+{
+  rtx picreg = rx_get_fdpic_reg_initial_val ();
+  rtx t = !can_create_pseudo_p ()
+	  ? operands[0]
+	  : gen_reg_rtx (GET_MODE (operands[0]));
+
+  rtx gotoffsym = gen_sym2GOTOFFFUNCDESC (operands[1]);
+  PUT_MODE (gotoffsym, Pmode);
+  emit_move_insn (t, gotoffsym);
+  emit_move_insn (operands[0], gen_rtx_PLUS (Pmode, t, picreg));
+  DONE;
+})
 
 (define_insn "loadGOT"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -2951,25 +3005,82 @@
   return "mvfc\tpc,%0\n\tadd\t#_GLOBAL_OFFSET_TABLE_,%0";
 })
 
+(define_expand "call_internal_got"
+  [(call (mem:QI (match_operand:SI 0 "rx_call_operand" "r,CALL_OP_SYMBOL_REF"))
+	 (const_int 0))
+   (use (reg:SI PIC_REG))
+   (clobber (reg:CC CC_REG))]
+  ""
+{
+  rtx gotsym;
+
+  rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
+  if (!TARGET_FDPIC)
+    {
+      gotsym = gen_sym2GOT (operands[0]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn (operands[0],
+                      gen_rtx_MEM(Pmode,
+                                  gen_rtx_PLUS(Pmode, picreg, gotsym)));
+    }
+  else
+    {
+      emit_move_insn (picreg, rx_get_fdpic_reg_initial_val ());
+      gotsym = gen_sym2GOTFUNCDESC (operands[0]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn(picreg, gen_rtx_PLUS(Pmode, picreg, gotsym));
+      emit_move_insn(operands[0], gen_rtx_MEM(Pmode, picreg));
+      emit_move_insn(picreg, gen_rtx_MEM(Pmode,
+                                         plus_constant(Pmode, picreg, 4)));
+    }
+  emit_call_insn (gen_call_internal (operands[0]));
+  DONE;
+})
+
+(define_insn "call_internal_plt"
+  [(call (mem:QI (match_operand:SI 0 "rx_symbolic_call_operand" ""))
+	 (const_int 0))
+   (use (reg:SI PIC_REG))
+   (clobber (reg:CC CC_REG))]
+  ""
+  "bsr\t%A0@PLT"
+  [(set_attr "length" "4")
+   (set_attr "timings" "33")]
+)
+
 (define_expand "call_value_internal_got"
   [(set (match_operand                  0 "register_operand" "=r,r")
        (call (mem:QI (match_operand:SI 1 "rx_call_operand"   "r,CALL_OP_SYMBOL_REF"))
              (const_int 0)))
+   (use (reg:SI PIC_REG))
    (clobber (reg:CC CC_REG))]
   ""
 {
-  rtx gotoffsym;
-  rtx t = (!can_create_pseudo_p ()
-          ? operands[0]
-          : gen_reg_rtx (GET_MODE (operands[0])));
+  rtx gotsym;
 
   rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
-
-  gotoffsym = gen_sym2GOTOFF (operands[1]);
-  emit_move_insn (t, gotoffsym);
-  emit_insn (gen_mov_from_got(t, picreg, gotoffsym));
-  emit_move_insn (operands[0], t);
-  emit_call_insn (gen_call_internal (operands[0]));
+  if (!TARGET_FDPIC)
+    {
+      gotsym = gen_sym2GOT (operands[1]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn (operands[0],
+                      gen_rtx_MEM(Pmode,
+                                  gen_rtx_PLUS(Pmode, picreg, gotsym)));
+      emit_call_insn (gen_call_value_internal (operands[0], operands[1]));
+    }
+  else
+    {
+      rtx t = !can_create_pseudo_p ()
+	      ? operands[1] : gen_reg_rtx (GET_MODE (operands[1]));
+      emit_move_insn (picreg, rx_get_fdpic_reg_initial_val ());
+      gotsym = gen_sym2GOTFUNCDESC (operands[1]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn(picreg, gen_rtx_PLUS(Pmode, picreg, gotsym));
+      emit_move_insn(t, gen_rtx_MEM(Pmode, picreg));
+      emit_move_insn(picreg, gen_rtx_MEM(Pmode,
+                                         plus_constant(Pmode, picreg, 4)));
+      emit_call_insn (gen_call_value_internal (operands[0], t));
+    }
   DONE;
 })
 
@@ -2985,34 +3096,96 @@
    (set_attr "timings" "33")]
 )
 
-(define_expand "call_value_got"
-  [(set (match_operand                  0 "register_operand" "=r,r")
-	(call (mem:QI (match_operand:SI 1 "rx_call_operand"   "r,CALL_OP_SYMBOL_REF"))
-	      (const_int 0)))
+(define_expand "sibcall_internal_got"
+  [(call (mem:QI (match_operand:SI 0 "rx_call_operand" "r,CALL_OP_SYMBOL_REF"))
+	 (const_int 0))
+   (use (reg:SI PIC_REG))
    (clobber (reg:CC CC_REG))]
   ""
 {
-  rtx gotoffsym;
-  rtx t = (!can_create_pseudo_p ()
-	   ? operands[0]
-	   : gen_reg_rtx (GET_MODE (operands[0])));
+  rtx gotsym;
 
   rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
-
-  gotoffsym = gen_sym2GOTOFF (operands[1]);
-  emit_move_insn (t, gotoffsym);
-  emit_insn (gen_mov_from_got(t, picreg, gotoffsym));
-  emit_move_insn (operands[0], t);
-  emit_call_insn (gen_call_internal (operands[0]));
+  if (!TARGET_FDPIC)
+    {
+      gotsym = gen_sym2GOT (operands[0]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn (operands[0],
+                      gen_rtx_MEM(Pmode,
+                                  gen_rtx_PLUS(Pmode, picreg, gotsym)));
+      emit_call_insn (gen_sibcall_internal (operands[0]));
+    }
+  else
+    {
+      rtx t = !can_create_pseudo_p ()
+	      ? operands[0] : gen_reg_rtx (GET_MODE (operands[0]));
+      emit_move_insn (picreg, rx_get_fdpic_reg_initial_val ());
+      gotsym = gen_sym2GOTFUNCDESC (operands[0]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn(picreg, gen_rtx_PLUS(Pmode, picreg, gotsym));
+      emit_move_insn(t, gen_rtx_MEM(Pmode, picreg));
+      emit_move_insn(picreg, gen_rtx_MEM(Pmode,
+                                         plus_constant(Pmode, picreg, 4)));
+      emit_call_insn (gen_sibcall_internal (t));
+    }
   DONE;
 })
 
-(define_insn "call_value_plt"
-  [(call (mem:QI (match_operand:SI 0 "rx_call_operand" "CALL_OP_SYMBOL_REF"))
+(define_insn "sibcall_internal_plt"
+  [(call (mem:QI (match_operand:SI 0 "rx_symbolic_call_operand" ""))
 	 (const_int 0))
+   (use (reg:SI PIC_REG))
+   (clobber (reg:CC CC_REG))]
+  ""
+  "bra\t%A0@PLT"
+  [(set_attr "length" "4")
+   (set_attr "timings" "33")]
+)
+
+(define_expand "sibcall_value_internal_got"
+  [(set (match_operand                  0 "register_operand" "=r,r")
+       (call (mem:QI (match_operand:SI 1 "rx_call_operand"   "r,CALL_OP_SYMBOL_REF"))
+             (const_int 0)))
+   (use (reg:SI PIC_REG))
+   (clobber (reg:CC CC_REG))]
+  ""
+{
+  rtx gotsym;
+
+  rtx picreg = gen_rtx_REG (Pmode, PIC_REG);
+  if (!TARGET_FDPIC)
+    {
+      gotsym = gen_sym2GOT (operands[1]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn (operands[0],
+                      gen_rtx_MEM(Pmode,
+                                  gen_rtx_PLUS(Pmode, picreg, gotsym)));
+      emit_call_insn (gen_sibcall_value_internal (operands[0], operands[1]));
+    }
+  else
+    {
+      rtx t = !can_create_pseudo_p ()
+	      ? operands[1] : gen_reg_rtx (GET_MODE (operands[1]));
+      emit_move_insn (picreg, rx_get_fdpic_reg_initial_val ());
+      gotsym = gen_sym2GOTFUNCDESC (operands[1]);
+      PUT_MODE (gotsym, Pmode);
+      emit_move_insn(picreg, gen_rtx_PLUS(Pmode, picreg, gotsym));
+      emit_move_insn(t, gen_rtx_MEM(Pmode, picreg));
+      emit_move_insn(picreg, gen_rtx_MEM(Pmode,
+                                         plus_constant(Pmode, picreg, 4)));
+      emit_call_insn (gen_sibcall_value_internal (operands[0], t));
+    }
+  DONE;
+})
+
+(define_insn "sibcall_value_internal_plt"
+  [(set (match_operand                  0 "register_operand" "=r")
+	(call (mem:QI (match_operand:SI 1 "rx_symbolic_call_operand" ""))
+	      (const_int 0)))
+   (use (reg:SI PIC_REG))
    (clobber (reg:CC CC_REG))]
   ""
-  "bsr\t%T0"
+  "bra\t%A1@PLT"
   [(set_attr "length" "4")
    (set_attr "timings" "33")]
 )

--- a/gcc/config/rx/rx.opt
+++ b/gcc/config/rx/rx.opt
@@ -143,3 +143,10 @@ Enables or disables the use of the SMOVF, SMOVB, SMOVU, SUNTIL, SWHILE and RMPA
 mjsr
 Target Mask(JSR)
 Always use JSR, never BSR, for calls.
+
+;---------------------------------------------------
+
+mfdpic
+Target Var(TARGET_FDPIC) Init(0)
+Generate ELF FDPIC code.
+