コミット: abab0080b8a4f62e9d4ddb41422fc80ab39aa024 - jmr6805break (git)

およそ20年前に、68HC05 の開発の練習に書いた車のブレイクライト・方向指示器コントローラです。

コミットメタ情報

• リビジョン: abab0080b8a4f62e9d4ddb41422fc80ab39aa024 (tree)
• 日時: 2013-07-08 21:39:02
• 作者: Joel Matthew Rees <reiisi@user...>
• コミッター: Joel Matthew Rees

ログメッセージ

I think this was working on the engine off state.

変更サマリ

• delete: TURNSIG.AS3 => TURNSIG.AS4

差分

--- a/TURNSIG.AS3
+++ b/TURNSIG.AS4
@@ -11,7 +11,7 @@
 *       Permission granted in advance for strictly non-profit
 * educational use.  All other rights retained by the author.
 
-* Authored by Joel Matthew Rees, June to August 1993
+* Authored by Joel Matthew Rees, June to October 1993
 *       of
 *       South Salt Lake City
 *       Utah 
@@ -27,14 +27,15 @@
 * parents' 1971 Colt fell apart some years back, rather than go to the
 * nearest Dodge dealer in the next city to order the part, I designed a
 * substitute switch using a pair of double-pole, double-throw relays in
-* set-reset latch configuration.  Momentary-closed pushbuttons set the
-* turn signals, and a momentary open pushbutton or reed switch shut them
-* off. (The reed switch and a magnet were glued inside the steering
-* column to provide a directionless turn signal return.)  I usurped the
-* emergency flasher unit and took power from the battery lead on the
-* ignition switch, so when I needed emergency flashers, I could just
-* turn both turn signals on. Mom had trouble getting used to this
-* arrangement, but it passed Texas inspection in the seventies.
+* set-reset latch configuration.  Momentary-closed pushbuttons (mounted
+* to the steering column cover) set the turn signals, and a momentary
+* open pushbutton (mounted between the set buttons) or reed switch
+* (mounted inside the cover housing so a magnet mounted to the steering
+* column would actuate it) shut them off.  I usurped the emergency
+* flasher unit and took power from the battery lead on the ignition
+* switch, so when I needed emergency flashers, I could just turn both
+* turn signals on. Mom had trouble getting used to this arrangement, but
+* it passed Texas inspection in the seventies.
 
 *       Examining the 68HC05K series MCUs brought that turn signal
 * switch back to mind.  I thought ten bits of I/O, internal timers,
@@ -57,14 +58,15 @@
 * parts (that tend to flow in hot climates and become brittle in cold)
 * with logic.  In order to eliminate the mechanical latching lever with
 * spring loaded return, I have (perhaps arbitrarily) enforced a new "user
-* Interface" involving momentary contact switches for the turn signals.
+* interface" involving momentary contact switches for the turn signals.
 * Two possible physical arrangements for the turn signal present
 * themselves to my mind:  In the one, a spring-loaded, non-latching
 * signal rod (the latch/return mechanism was the weakest part) actuates
 * momentary contact switches in two axes; the rod can be pushed up or
 * down to activate the turn signals, or it can be pushed in to actuate
 * the manual cancel.  In the other arrangement, the signal rod is fixed,
-* and three pushbuttons are provided on a pad at its end.
+* and three pushbuttons are provided on a pad at its end.  (Cancel in
+* the center would seem logical.)
 
 *       The emergency flasher switch is a momentary on pushbutton, and
 * it cancels itself in software -- push on, push off.  I think the audio
@@ -72,15 +74,14 @@
 
 *       The turn signal return mechanism is a pair of reed relays
 * mounted inside the bottom of the steering column housing about 11.25
-* degrees apart, with three to eight magnetic actuators distributed
-* around the steering shaft.  The shape, size, and position of the
-* magnets and reeds should be such that the reeds close only once as a
-* magnet passes, and such that the reeds have about 22.5 degrees of
-* overlapping actuation. The overlap in actuation is used to determine
-* the direction the steering wheel is rotating.  Minor changes to the
-* design should allow the use of optical sensors, but I have the
-* impression that magnetic devices are more immune to extremes of
-* climate.
+* degrees apart, with one to four magnetic actuators distributed around
+* the steering shaft.  The shape, size, and position of the magnets and
+* reeds should be such that the reeds close only once as a magnet
+* passes, and such that the reeds have about 22.5 degrees of total
+* actuation. The overlap in actuation is used to determine the direction
+* the steering wheel is rotating.  Minor changes to the design should
+* allow the use of optical sensors, but I have the impression that
+* magnetic devices are more immune to extremes of climate.  (Maybe?)
 
         SUBHEADER 'Model Schematic'
         PAGE
@@ -146,17 +147,18 @@
 * active high.
 
 *       I arbitrarily assume the signal lamp drivers will be active low.
-* Who could say why?  However, I have hidden this assumption in a macro
-* so I don't have to remember it.
+* Who could say why?  It should be easy to find all references to the
+* driver lines with a text editor and reverse the active states of the
+* outputs.
 
 *       Hanging the indicators and the audio feedback on the front lamp
 * drivers separates them from brake activity.  Two audio feedback
 * devices are used here because there were not enough MCU outputs to
 * drive a single cheap clicking device.  Stereo audio feedback might be
-* a nice touch anyway, allowing a person with normal hearing to
-* determine by sound which signal is on.  (A single channel of audio
-* feedback could be modulated as another way to distinguish the active
-* signal.)
+* a nice touch anyway, allowing a person with binaural hearing to
+* determine by sound which signal is on.  (If the ROM were a little
+* larger, a separate audio feedback could be modulated with different
+* sounds for left, right, and emergency flashers.)
 
 *       The center brake light is directly switched to eliminate one of
 * the separate high-power outputs. Fortunately, its state is not
@@ -167,8 +169,8 @@
 * input so that the MCU STOP mode can be used.  Brake lights and
 * emergency flashers must be accessible when the engine is off, so those
 * inputs are also interrupting.  The engine-on and brake inputs are
-* naturally positive-going signals, and the emergency flasher input is
-* not naturally biased, so the the emergency flasher seemed a more
+* naturally positive-going signals, but the emergency flasher input is
+* not naturally biased.  So the the emergency flasher seemed a more
 * natural match for IRQ.
 
 *       The following crude diagram illustrates the actuation in a left
@@ -210,9 +212,9 @@
 * its port is made an output and driven high.  Now, in addition to
 * manual cancel, the cancel port can sense steering wheel rotation.  In
 * same direction rotation, there is a lead period when the cancel input
-* does not remain high if the turn signal input port states are
-* inverted. Debounce suppresses cancel under these conditions.
-  
+* does not remain high if the turn signal input ports' output states are
+* inverted.  Debounce suppresses cancel under these conditions.
+
 *       Since the opposite direction turn signal switch port remains an
 * input, it can still be sensed.  The operator can change turn signals
 * directly, without hitting the cancel button.
@@ -223,20 +225,20 @@
 * to six mS required debounce period requires a minimum 10 milli-second
 * separate actuation period.  The actual result was 10.9 degrees
 * separate actuation (21.8 total), which I arbitrarily rounded up to a
-* power of two fraction of the circle: 1/16 circle total actuation and
-* 1/32 circle separate actuation.
+* power of two fraction of the circle: 2*PI/16 total actuation and
+* 2*PI/32 separate actuation.
 
 *       A peculiar characteristic of this design is the apparent lack of
 * use for the RESET input.  Since power-on reset is built in to the
 * K-series MCUs, RESET should probably be tied high.  However, I suppose
 * it could make a good manual cancel-all input, if such is necessary.
 
-*       This assembler appears not to have a bit not function for
+*       This assembler appears not to have a bit-not function for
 * operand expressions.  So, I have in several places resorted to the
 * rather obtuse expedient of exclusive-orring bits to be reset with $FF,
 * ergo,                 AND #{$FF ^ F_OPC ^ F_MNC}
 * instead of            AND #~(F_OPC | F_MNC)
-* which I think is clearer.
+* which I think would have been clearer.
 
         SUBHEADER 'Obligatory Mnemonics'
         PAGE
@@ -245,9 +247,9 @@ $include "68HC05K.EQU"
 
         SUBHEADER 'Program Mnemonics'
         PAGE
-* physical input definitions
+* physical I/O definitions
 * PORTA
-F_LDRV  equ B7
+F_LDRV  equ B7          ; four lamp drivers
 F_LDRV_ equ B7_
 F_RDRV  equ B6
 F_RDRV_ equ B6_
@@ -255,6 +257,11 @@ R_LDRV  equ B5
 R_LDRV_ equ B5_
 R_RDRV  equ B4
 R_RDRV_ equ B4_
+ALLAMPS equ {F_LDRV | F_RDRV | R_LDRV | R_RDRV}
+LFTDRV  equ {F_LDRV | R_LDRV}
+RGTDRV  equ {F_RDRV | R_RDRV}
+FRNTDRV equ {F_LDRV | F_RDRV}
+REARDRV eau {R_LDRV | R_RDRV}
 BRK_SW  equ B3
 BRK_SW_ equ B3_
 NGN_SW  equ B2          ; engine (ENG and EMG could be confusing)
@@ -273,17 +280,19 @@ RGT_BT_ equ B0_
 
 * logical input definitions for debounce and states
 * bits are remapped for debounce and speed
-* six bits of physical input, high two bits used for cancel logic
+* six bits of physical input, high two bits borrowed for cancel logic
 F_LFT   equ LFT_BT
 F_LFT_  equ LFT_BT_
 F_RGT   equ RGT_BT
 F_RGT_  equ RGT_BT_
+TURNSIG equ {F_LFT | F_RGT}
 F_BRK   equ {BRK_SW < 2}        ; physical output bit
 F_BRK_  equ {BRK_SW_ + 2}
 F_NGN   equ {NGN_SW < 2}        ; physical output bit
 F_NGN_  equ {NGN_SW_ + 2}
 F_EMG   equ {DRVDRV < 2}        ; fold onto output bit
 F_EMG_  equ {DRVDRV_ + 2}
+ANYLITE equ {TURNSIG | F_BRK | F_EMG}
 F_CAN   equ {CAN_BT < 2}
 F_CAN_  equ {CAN_BT_ + 2}
 F_OPC   equ $40                 ; opposite direction cancel record
@@ -292,27 +301,28 @@ F_MNC   equ $80                 ; manual cancel record
         SUBHEADER 'Resource Definitions'
         PAGE
 
-* crystal frequency, in MHz:
-XTAL    equ 1
-RTIPOW  equ 1   ; ls bits is right place for timer hardware
-RTIRATE equ {2 < RTIPOW}        ; 2 ^ RTIPOW stored is actual divide
+
+XTAL    equ 1   ; crystal frequency, in MHz
+RTIPOW  equ 1   ; bits 1 & 0 for timer hardware
+RTIRATE equ {2 < RTIPOW}        ; 2 ^ RTIPOW
 TIMOUT  equ {9155*XTAL/RTIRATE+1}       ; 5 minutes (if XTAL equ is correct)
 * only one flash rate, 2/3 duty cycle
-FLASH0  equ {32*XTAL/RTIRATE/4}         ; about 1/4 second
-FLASH1  equ {32*XTAL/RTIRATE/2}         ; about 1/2 second
+FLASH0  equ {32*XTAL/RTIRATE/4}         ; about 1/4 second off time
+FLASH1  equ {32*XTAL/RTIRATE/2}         ; about 1/2 second on time
 
         org MOR
         fcb {PIN3 | RC | PIRQ | COPEN}
 
         org RAMBEG
 DEBO    rmb 3   ; the debounce record chain
-STABLE  rmb 1   ; temporary record of stable bits
+SSTBLE  rmb 1   ; temporary record of stable bits
 TOGGLE  rmb 1   ; record of toggles
 ISTATE  rmb 1   ; record of the current input state
 STATES  rmb 1   ; current controller states
 NGN_TIM rmb 2   ; engine time out timer
 FLASH   rmb 1   ; flash timer
-FLTIME  rmb 1   ; flash flash time to load
+FLDARK  rmb 1   ; flash light or dark state, 11111111 == dark
+FLMASK  rmb 1   ; flash mask to communicate between BRK, EMG, and TRN
 
 
 * ROM definitions follow:
@@ -322,9 +332,9 @@ FLTIME  rmb 1   ; flash flash time to load
         PAGE
 
 *       The timer service routine has these functions: debouncing the
-* inputs, directly setting the brake lights, flagging changes in TOGGLE,
-* adjusting STATES to match the inputs, and maintaining two software
-* clocks. Interrupts occur on timer overflow (1024 CPU cycles).
+* inputs, flagging changes in TOGGLE, adjusting STATES to match the
+* inputs, and maintaining two software clocks. Interrupts occur on timer
+* overflow (1024 CPU cycles).
 
 *       The debounce routine translates the physical inputs to logical
 * inputs, maintains a record of the last three logical states sensed in
@@ -335,8 +345,9 @@ FLTIME  rmb 1   ; flash flash time to load
 * with a 1 MHz crystal, 2 to 3 mS with a 2 MHz crystal.
 
 *       This debounce technique works because we don't care what is
-* happening to the inputs between timer overflows, and because there is
-* no mechanism for noise coincident and rythmic with timer overflow.
+* happening to the inputs between timer overflows, and because we assume
+* there is no physical mechanism to induce noise coincident and rythmic
+* with timer overflow.
 
 *       The cancel TOGGLE bit is suppressed on same-direction rotation.
 * Trailing edge TOGGLEs are filtered out for all but brake and engine-on.
@@ -353,9 +364,23 @@ FLTIME  rmb 1   ; flash flash time to load
 * the button events in a queue.  (Darn!  I was kind of proud of that six
 * byte queue, and the shift technique for storing events into it.)
 
+*       The engine time-out counter resets on any activity on the engine
+* switch, emergency flashers, or brake lights.  This has the side effect
+* of allowing the turn signals to function with the engine off for five
+* minutes after the engine is shut off, or for five minutes after either
+* the brakes or emergency flashers are used.
+
+*       Both timers reset in such a manner as to be in a known state at
+* any time they are put into use.
+
+*       The emergency and turn signal signal flasher shares a single
+* rate and duty cycle.
+
         SUBHEADER 'Timer Service Code -- Debounce and Toggle Filter'
         PAGE
 
+        swi
+
 $CYCLE_ADDER_ON
 TIMSRV  bset TOFR_,TSCR
 
@@ -379,6 +404,8 @@ TMMEMG  lsra    ; remap
 
 * read the turn signal return and manual cancel auxiliary flags
 * (F_CAN & turn_sig_on) <=> read auxiliary flags
+* Assume that DDRB showing output means turn signal on and waiting
+* for cancel.
         bit #F_CAN      ; nothing at all without cancel
         beq TMSTGL
         ldx DDRB        ; meaningless if not waiting for cancel
@@ -403,7 +430,7 @@ $CYCLE_ADDER_OFF
 $CYCLE_ADDER_ON
 
 * debounce inputs, set flags in TOGGLE and ISTATE
-* STABLE = ~((DEBO[0] ^ DEBO[1]) | (DEBO[1] ^ DEBO[2]))
+* STABLE_BITS = ~((DEBO[0] ^ DEBO[1]) | (DEBO[1] ^ DEBO[2]))
 *
 TMSTGL  eor DEBO+1
         sta TOGGLE      ; re-use TOGGLE, TOGGLE not valid
@@ -411,18 +438,18 @@ TMSTGL  eor DEBO+1
         eor DEBO+2
         ora TOGGLE      ; a bit for any input that bounced
         coma            ; bits that bounced are clear
-        tax
-        and DEBO+2      ; state of stable bits
-        sta STABLE      ; (unstable bits still clear)
+        tax             ; STABLE_BITS
+        and DEBO        ; state of stable bits
+        sta SSTBLE      ; (unstable bits still clear)
         txa
         and ISTATE      ; look only at bits that are stable
-        eor STABLE      ; flag bits that toggled
+        eor SSTBLE      ; flag bits that toggled
         sta TOGGLE      ; true TOGGLEs, but not yet filtered
         coma            ; mask of non-toggles
         and ISTATE      ; old state of non-toggles
         sta ISTATE      ; (toggled bits cleared)
         lda TOGGLE      ; mask of toggles
-        and STABLE      ; new states of bits that toggled
+        and SSTBLE      ; new states of bits that toggled
         ora ISTATE
         sta ISTATE      ; ISTATE now has current debounced inputs
 
@@ -448,19 +475,20 @@ TMBRKMV bclr F_BRK_,STATES
         bset F_BRK_,STATES
 
 * toggle STATES F_EMG if TOGGLE F_EMG
-TMEMGMV brclr F_EMG_,TOGGLE,TMEMGM0
+TMEMGMV brclr F_EMG_,TOGGLE,TMEMG0
         lda STATES
         eor #F_EMG
 TMEMG0  sta STATES
 
 * turn on STATES turn signal if TOGGLE turn signal
+* (TOGGLE was filtered on trailing edge!)
         lda TOGGLE
-        and #{F_LFT | F_RGT}
+        and #TURNSIG
         ora STATES
 
 * cancel STATES turn signal if TOGGLE F_CAN is not filtered out
         brclr F_CAN_,TOGGLE,TMCAN0
-        and #{$FF ^ F_LFT ^ F_RGT}      ; STATES still in A
+        and #{$FF ^ TURNSIG}    ; STATES still in A
 TMCAN0  sta STATES
 
 *       Engine time out state is handled within the software timer
@@ -476,12 +504,14 @@ TMCLOCK
         brclr RTIF_,TSCR,TIMDUN
         bset RTIFR_,TSCR
 
-*       The engine time-out counter resets if engine on toggles.  It
-* runs only when the ISTATE F_NGN bit is low and the emergency flashers
-* and brakes (STATES F_EMG and F_BRK) are off.  It does not underfow.
-* The timer flags timeout in STATES F_NGN.
+*       The engine time-out counter resets if NGN, EMG, or BRK toggles.
+* It runs only when the ISTATE F_NGN bit is low and the emergency
+* flashers and brakes (STATES F_EMG and F_BRK) are off.  It does not
+* underfow. The timer flags timeout in STATES F_NGN.
 
-        brclr F_NGN_,TOGGLE,TMNGN0      ; reset on toggle off (and on)
+        lda TOGGLE
+        and #{F_NGN | F_EMG | F_BRK}
+        beq TMNGN0      ; reset on toggle off (and on)
         lda #{TIMOUT & $FF }            ; reset value low byte
         sta NGN_TIM+1
         lda #{TIMOUT / $100 + 1}        ; borrow on 0, not -1
@@ -491,28 +521,42 @@ TMCLOCK
 TMNGN0
         lda STATES
         and #{F_NGN | F_EMG | F_BRK}    ; brakes or emg flashers?
-        eor #F_NGN                      ; no underflow
+        eor #F_NGN                      ; engine already off?
         bne TMFLASH
-        brset F_NGN_,ISTATE,TMFLASH
+        brset F_NGN_,ISTATE,TMFLASH     ; ISTATE F_NGN back on?
         dec NGN_TIM+1
-        bne TIMFLH      ; initial count is adjusted to make this work
+        bne TMFLASH      ; initial count is adjusted to make this work
         dec NGN_TIM
-        bne TIMFLH
+        bne TMFLASH
         bclr F_NGN_,STATES      ; signal timed out
-        bset F_NGN_,TOGGLE      ; communicate with MAINLOOP
+        bset F_NGN_,TOGGLE      ; communicate change to STATES F_NGN
+
+*       The flasher counter runs only when STATES F_EMG, F_LFT, or F_RGT
+* are set.  When there are no flashers running, FLDARK is set, causing
+* FLASH1 (on time) to be loaded when when flasher timer starts.
+
+TMFLASH lda #{F_EMG | TURNSIG}
+        bit STATES      ; flasher active?
+        bne TMFLH1
+        lda #-1         ; reset flash timer
+        sta FLDARK
+        lda #FLASH1
+        sta FLASH
+        bra TIMDUN
 
-* flasher counter
-TMFLASH lda #{F_EMG | F_LFT | F_RGT}
-        and STATES      ; flasher active?
-        beq TIMDUN
-        dec FLASH
+TMFLH1  dec FLASH
         bne TIMDUN
-        lda FLTIME
-        sta FLASH
+        lda #FLASH1
+        com FDARK
+        bpl TMFLTM      ; result dark (1s) or light (0s)
+        lda #FLASH0
+TMFLTM  sta FLASH
 
 TIMDUN  rti
 $CYCLE_ADDER_OFF
 
+        swi
+
         SUBHEADER 'Initializations'
         PAGE
 
@@ -525,9 +569,9 @@ SWISRV
         rsp     ; now falls through to RSTSRV
 
 * general inits
-RSTSRV  lda #{F_LDRV | F_RDRV | R_LDRV | R_RDRV}
+RSTSRV  lda #ALLAMPS
         sta PORTA       ; initial output values
-        lda #{F_LDRV | F_RDRV | R_LDRV | R_RDRV | DRVDRV}
+        lda #{ALLAMPS | DRVDRV}
         sta DDRA        ; set up directions
         sta PDRA        ; pull downs only on inputs
         clr PORTB       ; initial outputs (do port B just in case)
@@ -547,15 +591,17 @@ RSTSRV  lda #{F_LDRV | F_RDRV | R_LDRV | R_RDRV}
         ora #{TOFR|RTIFR}       ; clear the flags
         sta TSCR
 * set up specific variables
-        clr DEBO        ; start debounce chain clear
-        clr DEBO+1      ; DEBO+2 is thrown out on first timer interrupt
-        clr STATES      ; no unknown states
-        clr ISTATE
-* because F_NGN may not be on, and we don't depend on timer reset quirks:
-        lda #{TIMOUT & $FF }            ; reset value low byte
-        sta NGN_TIM+1
-        lda #{TIMOUT / $100 + 1}        ; borrow on 0, not -1
-        sta NGN_TIM
+        lda #F_NGN      ; pretend the engine is on, to get us started
+        sta DEBO        ; start debounce chain clear
+        sta DEBO+1      ; DEBO+2 is thrown out on first timer interrupt
+        sta STATES      ; no unknown states
+        sta ISTATE
+        sta TOGGLE      ; forces time-out counter to reset
+        lda #-1
+        sta FLDARK      ; initial flash state is dark
+        lda #FLASH1
+        sta FLASH       ; initial flash time is on/light state
+
 
 * Falls through to DOSTATES
 
@@ -563,71 +609,59 @@ RSTSRV  lda #{F_LDRV | F_RDRV | R_LDRV | R_RDRV}
         PAGE
 
 DOSTATES:
-        cli     ; leave interrupts enabled as much as possible
+        wait
         clra
         sta COPR        ; tell COP we're in control
 
-* State machine for STATES
-* Brake, eNgine, emerGency, Left, and Right
-*
-* B N G L R | output
-* ----------|------
-* 1 x x x x | Brake lights!
-* 0 x 1 x x | Emergency flashers!
-* 0 0 0 x x | Power Down
-* 0 1 0 0 0 | No outputs
-* 0 1 0 0 1 | Right turn signal
-* 0 1 0 1 0 | Left turn signal
-* 0 1 0 1 1 | NONE, clear turn signal states
-*
-* Cancel is entirely handled within TIMSRV
-
-        sei     ; is this necessary?
-        brset F_BRK_,STATES,STBRK
-        brset F_EMG_,STATES,STEMG
-        brclr F_EMG_,STATES,STNG0
-
-****** put turn signal code in here
-
-STBRK
-        bra DOSTATES
-
-STEMG
-        bra DOSTATES
-
-STNG0
-
-* had some power conserving in here
-*        lda STATES              ; can we save power for a bit?
-*        and #{F_LFT | F_RGT | F_BRK | F_EMG}
-*        bne MNDRVWT
-*        bclr DRVDRV_,PORTA
-*MNDRVWT wait    ; enable interrupts, wait for timer
-*        tst TOGGLE
-*        beq MNDRVWT     ; nothing changed, nothing to respond to
-** with no activity, COP periodically resets the MCU system
-** this is not generally good engineering practice.
-*        bset DRVDRV_,PORTA      ; IRQSRV might have driven the brake lights
-*        bra MAINLOOP    ; check STOP and QUEUE again
-*
-** go to power conserving state
-*MNSTOP  lda #{F_LDRV | F_RDRV | R_LDRV | R_RDRV}
-*        sta PORTA       ; shut everything down, organized!
-*        lda #{F_LDRV | F_RDRV | R_LDRV | R_RDRV | DRVDRV}
-*        sta DDRA        ; set up directions
-*        sta PDRA        ; pull downs only on inputs
-*        clr PORTB       ; initial outputs (do port B just in case)
-*        clr DDRB        ; B initially input
-*        clr PDRB        ; with pull downs set
-** make sure EPROM programming stuff is out of the way
-*        clr EPROG
-*        clr PESCR
-** enable external interrupts
-*        bset IRQE_,ISCR ; DO NOT clear the flag (IRQ won't return)
-*        stop    ; also shuts timer down
-*        jmp SWISRV      ; should never come here (resets stack pointer)
-
-        bra DOSTATES
+* update the output state
+        lda #ALLAMPS    ; guess nothing shines
+STTBRK0 brclr F_EMG_,STATES,STTRGT      ; EMG has priority
+        and #{$FF ^ ALLAMPS}
+
+STTRGT  brclr F_LFT_,STATES,STTLFT
+        and #{$FF ^ LFTDRV}             ; assume never LFT & RGT both
+
+STTLFT  brclr F_RGT_,STATES,STTBRK      ; no flashers?
+        and #{$FF ^ RGTDRV}
+
+STTFLH  ora FLDARK      ; mask out if flashers off
+
+STTBRK  brclr F_BRK_,STATES,STTLIT
+        and #{$FF ^ REARDRV}    ; brake has highest priority
+        and #ALLAMPS    ; filter out DRVDRV, in particular
+        sta FLMASK
+        lda STATES      ; do we need DRVDRV?
+        and #ANYLITE    ; avoid turning DRVDRV on and off:
+        beq STT0LIT
+        bset DRVDRV_    ; keep set during dark part of flash
+
+STT0LIT lda PORTA
+        and #{$FF ^ ALLAMPS ^ DRVDRV}
+        ora FLMASK
+        sta PORTA
+
+        brclr F_NGN_,STATES,DOSTATES    ; all done until next time out
+
+* At this point, we know there has been neither engine nor flasher activity
+* for about five minutes.
+
+* go to power conserving state
+MNSTOP  lda #ALLAMPS    ; make sure they are off
+        sta PORTA       ; shut everything down, organized!
+        lda #{ALLAMPS | DRVDRV}
+        sta DDRA        ; set up directions
+        sta PDRA        ; pull downs only on inputs
+        clr PORTB       ; initial outputs (do port B just in case)
+        clr DDRB        ; B initially input
+        clr PDRB        ; with pull downs set
+* make sure EPROM programming stuff is out of the way
+        clr EPROG
+        clr PESCR
+* enable external interrupts
+        bset IRQE_,ISCR ; DO NOT clear the flag (don't miss anything)
+        stop    ; also shuts timer down
+        swi     ; should never come here (resets stack pointer)
+