コミット: 6fd5f8407f93d1fa99a443e3b31d5792633f911d - exorsim6809 (git)

Joe H. Allen's exorsim with 6809 (and 6801)

コミットメタ情報

• リビジョン: 6fd5f8407f93d1fa99a443e3b31d5792633f911d (tree)
• 日時: 2020-11-17 01:24:53
• 作者: Joel Matthew Rees <joel.rees@gmai...>
• コミッター: Joel Matthew Rees

ログメッセージ

assembler additions functional, lightly tested, but allow things like
sts #

変更サマリ

• modified: asm6800.c

差分

--- a/asm6800.c
+++ b/asm6800.c
@@ -20,6 +20,7 @@
 #include <stdlib.h>
 #include <string.h>
 
+#include "exorsim.h"	/* JMR20201103 */
 #include "asm6800.h"
 #include "utils.h"	/* JMR20201103 */
 
@@ -191,6 +192,9 @@ enum {
         ACC,	/* Accumulator needed */
         ACC1,	/* Accumulator optional */
         ACCB,	/* we need an A or a B: add 0x01 for B */
+#ifdef SIM6801
+        ACCD,	/* LDD,STD,ADDD,SUBD */
+#endif /* def SIM6801 */
         NONE	/* No operand */
 };
 
@@ -236,11 +240,22 @@ struct { char *insn; int opcode; int type; } table[] =
         { "orab", 0xca, RM },
         { "addb", 0xcb, RM },
 
+#ifdef SIM6801
+        { "subd", 0x83, ACCD },
+        { "addd", 0xc3, ACCD },
+        { "ldd", 0xcc, ACCD },
+        { "std", 0xcd, ACCD },
+#endif /* def SIM6801 */
+
         { "cpx", 0x8c, IDX },
         { "bsr", 0x8d, REL },
         { "lds", 0x8e, IDX },
         { "sts", 0x8f, IDX },
+#ifndef SIM6801
         { "jsr", 0x8d, RMW },
+#else /* def SIM6801 */
+        { "jsr", 0x8d, IDX },
+#endif /* ndef SIM6801 */
         { "ldx", 0xce, IDX },
         { "stx", 0xcf, IDX },
 
@@ -250,6 +265,9 @@ struct { char *insn; int opcode; int type; } table[] =
         { "ror", 0x46, RMW },
         { "asr", 0x47, RMW },
         { "asl", 0x48, RMW },
+#ifdef SIM6801
+/*        { "lsl", 0x48, NONE }, / * alias */
+#endif /* def SIM6801 */
         { "rol", 0x49, RMW },
         { "dec", 0x4a, RMW },
         { "inc", 0x4c, RMW },
@@ -263,6 +281,9 @@ struct { char *insn; int opcode; int type; } table[] =
         { "rora", 0x46, NONE },
         { "asra", 0x47, NONE },
         { "asla", 0x48, NONE },
+#ifdef SIM6801
+/*        { "lsla", 0x48, NONE }, / * alias */
+#endif /* def SIM6801 */
         { "rola", 0x49, NONE },
         { "deca", 0x4a, NONE },
         { "inca", 0x4c, NONE },
@@ -275,6 +296,9 @@ struct { char *insn; int opcode; int type; } table[] =
         { "rorb", 0x56, NONE },
         { "asrb", 0x57, NONE },
         { "aslb", 0x58, NONE },
+#ifdef SIM6801
+/*        { "lslb", 0x58, NONE }, / * alias */
+#endif /* def SIM6801 */
         { "rolb", 0x59, NONE },
         { "decb", 0x5a, NONE },
         { "incb", 0x5c, NONE },
@@ -282,6 +306,11 @@ struct { char *insn; int opcode; int type; } table[] =
         { "clrb", 0x5f, NONE },
 
         { "nop", 0x01, NONE },
+#ifdef SIM6801
+        { "lsrd", 0x04, NONE },
+        { "asld", 0x05, NONE },
+/*        { "lsld", 0x05, NONE }, / * alias */
+#endif /* def SIM6801 */
         { "tap", 0x06, NONE },
         { "tpa", 0x07, NONE },
         { "inx", 0x08, NONE },
@@ -300,10 +329,19 @@ struct { char *insn; int opcode; int type; } table[] =
         { "aba", 0x1b, NONE },
 
         { "bra", 0x20, REL },
+#ifdef SIM6801
+        { "brn", 0x21, REL },
+#endif /* def SIM6801 */
         { "bhi", 0x22, REL },
         { "bls", 0x23, REL },
         { "bcc", 0x24, REL },
+#ifdef SIM6801
+/*        { "bhs", 0x24, REL }, / * alias */
+#endif /* def SIM6801 */
         { "bcs", 0x25, REL },
+#ifdef SIM6801
+/*        { "blo", 0x25, REL }, / * alias */
+#endif /* def SIM6801 */
         { "bne", 0x26, REL },
         { "beq", 0x27, REL },
         { "bvc", 0x28, REL },
@@ -325,8 +363,18 @@ struct { char *insn; int opcode; int type; } table[] =
         { "psh", 0x36, ACCB },
         { "psha", 0x36, NONE },
         { "pshb", 0x37, NONE },
+#ifdef SIM6801
+        { "pulx", 0x38, NONE },
+#endif /* def SIM6801 */
         { "rts", 0x39, NONE },
+#ifdef SIM6801
+        { "abx", 0x3a, NONE },
+#endif /* defSIM6801 */
         { "rti", 0x3b, NONE },
+#ifdef SIM6801
+        { "pshx", 0x3c, NONE },
+        { "mul", 0x3d, NONE },
+#endif /* def SIM6801 */
         { "wai", 0x3e, NONE },
         { "swi", 0x3f, NONE },
 
@@ -537,7 +585,11 @@ unsigned assemble(unsigned char *mem, unsigned addr, char *buf)
                                         add_fixup(sy, addr, FIXUP_DIR, operand);
                                 mem[addr++] = operand;
                                 goto done;
+#ifndef SIM6801
                         } else if (type == IDX) {
+#else /* def SIM6801 */
+                        } else if (type == IDX || type == ACCD) {
+#endif /* ndef SIM6801 */
                                 /* 16-bit immediate */
                                 mem[addr++] = opcode;
                                 if (sy)
@@ -560,7 +612,11 @@ unsigned assemble(unsigned char *mem, unsigned addr, char *buf)
                                 if (buf[0] == ',' && (buf[1] == 'x' || buf[1] == 'X')) {
                                         ndx:
                                         /* We have an indexed operand */
+#ifndef SIM6801
                                         if (type == RM || type == IDX || type == RMW) {
+#else /* def SIM6801 */
+                                        if (type == RM || type == IDX ||  type == ACCD || type == RMW) {
+#endif /* ndef SIM6801 */
                                                 mem[addr++] = opcode + 0x20;;
                                                 if (sy)
                                                         add_fixup(sy, addr, FIXUP_DIR, operand);
@@ -572,11 +628,19 @@ unsigned assemble(unsigned char *mem, unsigned addr, char *buf)
                                         }
                                 } else {
                                         /* We have a direct address operand */
+#ifndef SIM6801
                                         if ((type == RM || type == IDX) && !sy && operand < 256) {
+#else /* def SIM6801 */
+                                        if ((type == RM || type == IDX || type == ACCD) && !sy && operand < 256) {
+#endif /* ndef SIM6801 */
                                                 mem[addr++] = opcode + 0x10;
                                                 mem[addr++] = operand;
                                                 goto done;
+#ifndef SIM6801
                                         } else if (type == RM || type == IDX || type == RMW) {
+#else /* def SIM6801 */
+                                        } else if (type == RM || type == IDX || type == ACCD || type == RMW) {
+#endif /* ndef SIM6801 */
                                                 mem[addr++] = opcode + 0x30;
                                                 if (sy)
                                                         add_fixup(sy, addr, FIXUP_EXT, operand);