hardware/intel/intel-driver
リビジョン | 8e8d5487b09cd1d8f421e3147d671c4c35fdb039 (tree) |
---|---|
日時 | 2015-09-06 16:13:57 |
作者 | Xiang, Haihao <haihao.xiang@inte...> |
コミッター | Xiang, Haihao |
encode/hevc: fix HEVC encode on SKL GT3
GT3 has 2 BSD rings, but HEVC commands can be only dispatched to BSD ring 0.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 611d8ea9d75dc026c203e3ebe53b434769d4587c)
@@ -1783,6 +1783,7 @@ gen9_hcpe_hevc_pipeline_programing(VADriverContextP ctx, | ||
1783 | 1783 | struct encode_state *encode_state, |
1784 | 1784 | struct intel_encoder_context *encoder_context) |
1785 | 1785 | { |
1786 | + struct i965_driver_data *i965 = i965_driver_data(ctx); | |
1786 | 1787 | struct intel_batchbuffer *batch = encoder_context->base.batch; |
1787 | 1788 | dri_bo *slice_batch_bo; |
1788 | 1789 |
@@ -1793,7 +1794,10 @@ gen9_hcpe_hevc_pipeline_programing(VADriverContextP ctx, | ||
1793 | 1794 | #endif |
1794 | 1795 | |
1795 | 1796 | // begin programing |
1796 | - intel_batchbuffer_start_atomic_bcs(batch, 0x4000); | |
1797 | + if (i965->intel.has_bsd2) | |
1798 | + intel_batchbuffer_start_atomic_bcs_override(batch, 0x4000, BSD_RING0); | |
1799 | + else | |
1800 | + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); | |
1797 | 1801 | intel_batchbuffer_emit_mi_flush(batch); |
1798 | 1802 | |
1799 | 1803 | // picture level programing |