hardware/intel/intel-driver
リビジョン | 5d528baf61d392d84e846e22bc7c4474f02c4050 (tree) |
---|---|
日時 | 2016-06-07 14:11:49 |
作者 | Zhao Yakui <yakui.zhao@inte...> |
コミッター | Xiang, Haihao |
Fix the potential NULL issue
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
@@ -272,6 +272,11 @@ gen9_vp9_init_check_surfaces(VADriverContextP ctx, | ||
272 | 272 | &vp9_surface->scaled_4x_surface_id); |
273 | 273 | |
274 | 274 | vp9_surface->scaled_4x_surface_obj = SURFACE(vp9_surface->scaled_4x_surface_id); |
275 | + | |
276 | + if (!vp9_surface->scaled_4x_surface_obj) { | |
277 | + return VA_STATUS_ERROR_ALLOCATION_FAILED; | |
278 | + } | |
279 | + | |
275 | 280 | i965_check_alloc_surface_bo(ctx, vp9_surface->scaled_4x_surface_obj, 1, |
276 | 281 | VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); |
277 | 282 |
@@ -284,6 +289,11 @@ gen9_vp9_init_check_surfaces(VADriverContextP ctx, | ||
284 | 289 | 1, |
285 | 290 | &vp9_surface->scaled_16x_surface_id); |
286 | 291 | vp9_surface->scaled_16x_surface_obj = SURFACE(vp9_surface->scaled_16x_surface_id); |
292 | + | |
293 | + if (!vp9_surface->scaled_16x_surface_obj) { | |
294 | + return VA_STATUS_ERROR_ALLOCATION_FAILED; | |
295 | + } | |
296 | + | |
287 | 297 | i965_check_alloc_surface_bo(ctx, vp9_surface->scaled_16x_surface_obj, 1, |
288 | 298 | VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); |
289 | 299 |
@@ -344,6 +354,11 @@ gen9_vp9_check_dys_surfaces(VADriverContextP ctx, | ||
344 | 354 | 1, |
345 | 355 | &vp9_surface->dys_surface_id); |
346 | 356 | vp9_surface->dys_surface_obj = SURFACE(vp9_surface->dys_surface_id); |
357 | + | |
358 | + if (!vp9_surface->dys_surface_obj) { | |
359 | + return VA_STATUS_ERROR_ALLOCATION_FAILED; | |
360 | + } | |
361 | + | |
347 | 362 | i965_check_alloc_surface_bo(ctx, vp9_surface->dys_surface_obj, 1, |
348 | 363 | VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); |
349 | 364 |
@@ -358,6 +373,11 @@ gen9_vp9_check_dys_surfaces(VADriverContextP ctx, | ||
358 | 373 | &vp9_surface->dys_4x_surface_id); |
359 | 374 | |
360 | 375 | vp9_surface->dys_4x_surface_obj = SURFACE(vp9_surface->dys_4x_surface_id); |
376 | + | |
377 | + if (!vp9_surface->dys_4x_surface_obj) { | |
378 | + return VA_STATUS_ERROR_ALLOCATION_FAILED; | |
379 | + } | |
380 | + | |
361 | 381 | i965_check_alloc_surface_bo(ctx, vp9_surface->dys_4x_surface_obj, 1, |
362 | 382 | VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); |
363 | 383 |
@@ -370,6 +390,11 @@ gen9_vp9_check_dys_surfaces(VADriverContextP ctx, | ||
370 | 390 | 1, |
371 | 391 | &vp9_surface->dys_16x_surface_id); |
372 | 392 | vp9_surface->dys_16x_surface_obj = SURFACE(vp9_surface->dys_16x_surface_id); |
393 | + | |
394 | + if (!vp9_surface->dys_16x_surface_obj) { | |
395 | + return VA_STATUS_ERROR_ALLOCATION_FAILED; | |
396 | + } | |
397 | + | |
373 | 398 | i965_check_alloc_surface_bo(ctx, vp9_surface->dys_16x_surface_obj, 1, |
374 | 399 | VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); |
375 | 400 |
@@ -1135,6 +1160,10 @@ void gen9_vp9_set_curbe_brc(VADriverContextP ctx, | ||
1135 | 1160 | segment_param = param->psegment_param; |
1136 | 1161 | |
1137 | 1162 | cmd = gen8p_gpe_context_map_curbe(gpe_context); |
1163 | + | |
1164 | + if (!cmd) | |
1165 | + return; | |
1166 | + | |
1138 | 1167 | memset(cmd, 0, sizeof(vp9_brc_curbe_data)); |
1139 | 1168 | |
1140 | 1169 | if (!vp9_state->dys_enabled) |
@@ -1548,7 +1577,7 @@ intel_vp9enc_construct_picstate_batchbuf(VADriverContextP ctx, | ||
1548 | 1577 | pdata = i965_map_gpe_resource(gpe_resource); |
1549 | 1578 | vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; |
1550 | 1579 | |
1551 | - if (!vp9_state || !vp9_state->pic_param) | |
1580 | + if (!vp9_state || !vp9_state->pic_param || !pdata) | |
1552 | 1581 | return; |
1553 | 1582 | |
1554 | 1583 | pic_param = vp9_state->pic_param; |
@@ -1954,6 +1983,10 @@ gen9_vp9_brc_update_kernel(VADriverContextP ctx, | ||
1954 | 1983 | { |
1955 | 1984 | char *brc_const_buffer; |
1956 | 1985 | brc_const_buffer = i965_map_gpe_resource(&vme_context->res_brc_const_data_buffer); |
1986 | + | |
1987 | + if (!brc_const_buffer) | |
1988 | + return VA_STATUS_ERROR_OPERATION_FAILED; | |
1989 | + | |
1957 | 1990 | if (vp9_state->picture_coding_type) |
1958 | 1991 | memcpy(brc_const_buffer, vp9_brc_const_data_p_g9, |
1959 | 1992 | sizeof(vp9_brc_const_data_p_g9)); |
@@ -2025,6 +2058,10 @@ void gen9_vp9_set_curbe_me(VADriverContextP ctx, | ||
2025 | 2058 | enc_media_state = VP9_MEDIA_STATE_4X_ME; |
2026 | 2059 | |
2027 | 2060 | me_cmd = gen8p_gpe_context_map_curbe(gpe_context); |
2061 | + | |
2062 | + if (!me_cmd) | |
2063 | + return; | |
2064 | + | |
2028 | 2065 | memset(me_cmd, 0, sizeof(vp9_me_curbe_data)); |
2029 | 2066 | |
2030 | 2067 | me_cmd->dw1.max_num_mvs = 0x10; |
@@ -2362,6 +2399,10 @@ gen9_vp9_set_curbe_scaling_cm(VADriverContextP ctx, | ||
2362 | 2399 | vp9_scaling4x_curbe_data_cm *curbe_cmd; |
2363 | 2400 | |
2364 | 2401 | curbe_cmd = gen8p_gpe_context_map_curbe(gpe_context); |
2402 | + | |
2403 | + if (!curbe_cmd) | |
2404 | + return; | |
2405 | + | |
2365 | 2406 | memset(curbe_cmd, 0, sizeof(vp9_scaling4x_curbe_data_cm)); |
2366 | 2407 | |
2367 | 2408 | curbe_cmd->dw0.input_picture_width = curbe_param->input_picture_width; |
@@ -2549,8 +2590,15 @@ static void | ||
2549 | 2590 | gen9_vp9_dys_set_sampler_state(struct i965_gpe_context *gpe_context) |
2550 | 2591 | { |
2551 | 2592 | struct gen9_sampler_8x8_avs *sampler_cmd; |
2593 | + | |
2594 | + if (!gpe_context) | |
2595 | + return; | |
2596 | + | |
2552 | 2597 | dri_bo_map(gpe_context->dynamic_state.bo, 1); |
2553 | 2598 | |
2599 | + if (!gpe_context->dynamic_state.bo->virtual) | |
2600 | + return; | |
2601 | + | |
2554 | 2602 | sampler_cmd = (struct gen9_sampler_8x8_avs *) |
2555 | 2603 | (gpe_context->dynamic_state.bo->virtual + gpe_context->sampler_offset); |
2556 | 2604 |
@@ -2623,6 +2671,10 @@ gen9_vp9_set_curbe_dys(VADriverContextP ctx, | ||
2623 | 2671 | vp9_dys_curbe_data *curbe_cmd; |
2624 | 2672 | |
2625 | 2673 | curbe_cmd = gen8p_gpe_context_map_curbe(gpe_context); |
2674 | + | |
2675 | + if (!curbe_cmd) | |
2676 | + return; | |
2677 | + | |
2626 | 2678 | memset(curbe_cmd, 0, sizeof(vp9_dys_curbe_data)); |
2627 | 2679 | |
2628 | 2680 | curbe_cmd->dw0.input_frame_width = curbe_param->input_width; |
@@ -2780,7 +2832,8 @@ gen9_vp9_run_dys_refframes(VADriverContextP ctx, | ||
2780 | 2832 | &dys_kernel_param); |
2781 | 2833 | } |
2782 | 2834 | |
2783 | - if (vp9_state->dys_ref_frame_flag & VP9_LAST_REF) { | |
2835 | + if ((vp9_state->dys_ref_frame_flag & VP9_LAST_REF) && | |
2836 | + vp9_state->last_ref_obj) { | |
2784 | 2837 | obj_surface = vp9_state->last_ref_obj; |
2785 | 2838 | vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); |
2786 | 2839 |
@@ -2832,7 +2885,8 @@ gen9_vp9_run_dys_refframes(VADriverContextP ctx, | ||
2832 | 2885 | } |
2833 | 2886 | } |
2834 | 2887 | |
2835 | - if (vp9_state->dys_ref_frame_flag & VP9_GOLDEN_REF) { | |
2888 | + if ((vp9_state->dys_ref_frame_flag & VP9_GOLDEN_REF) && | |
2889 | + vp9_state->golden_ref_obj) { | |
2836 | 2890 | obj_surface = vp9_state->golden_ref_obj; |
2837 | 2891 | vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); |
2838 | 2892 |
@@ -2884,7 +2938,8 @@ gen9_vp9_run_dys_refframes(VADriverContextP ctx, | ||
2884 | 2938 | } |
2885 | 2939 | } |
2886 | 2940 | |
2887 | - if (vp9_state->dys_ref_frame_flag & VP9_ALT_REF) { | |
2941 | + if ((vp9_state->dys_ref_frame_flag & VP9_ALT_REF) && | |
2942 | + vp9_state->alt_ref_obj) { | |
2888 | 2943 | obj_surface = vp9_state->alt_ref_obj; |
2889 | 2944 | vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); |
2890 | 2945 |
@@ -2969,6 +3024,10 @@ gen9_vp9_set_curbe_mbenc(VADriverContextP ctx, | ||
2969 | 3024 | } |
2970 | 3025 | |
2971 | 3026 | curbe_cmd = gen8p_gpe_context_map_curbe(gpe_context); |
3027 | + | |
3028 | + if (!curbe_cmd) | |
3029 | + return; | |
3030 | + | |
2972 | 3031 | memset(curbe_cmd, 0, sizeof(vp9_mbenc_curbe_data)); |
2973 | 3032 | |
2974 | 3033 | if (vp9_state->dys_in_use) |
@@ -3843,6 +3902,10 @@ gen9_encode_vp9_check_parameter(VADriverContextP ctx, | ||
3843 | 3902 | encode_state->seq_param_ext->buffer) |
3844 | 3903 | seq_param = (VAEncSequenceParameterBufferVP9 *)encode_state->seq_param_ext->buffer; |
3845 | 3904 | |
3905 | + if (!seq_param) { | |
3906 | + seq_param = &vp9_state->bogus_seq_param; | |
3907 | + } | |
3908 | + | |
3846 | 3909 | vp9_state->pic_param = pic_param; |
3847 | 3910 | vp9_state->segment_param = seg_param; |
3848 | 3911 | vp9_state->seq_param = seq_param; |
@@ -4051,7 +4114,8 @@ gen9_encode_vp9_check_parameter(VADriverContextP ctx, | ||
4051 | 4114 | !pic_param->pic_flags.bits.intra_only) { |
4052 | 4115 | vp9_state->dys_ref_frame_flag = vp9_state->ref_frame_flag; |
4053 | 4116 | |
4054 | - if (vp9_state->ref_frame_flag & VP9_LAST_REF) { | |
4117 | + if ((vp9_state->ref_frame_flag & VP9_LAST_REF) && | |
4118 | + vp9_state->last_ref_obj) { | |
4055 | 4119 | obj_surface = vp9_state->last_ref_obj; |
4056 | 4120 | vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); |
4057 | 4121 |
@@ -4059,7 +4123,8 @@ gen9_encode_vp9_check_parameter(VADriverContextP ctx, | ||
4059 | 4123 | vp9_state->frame_height == vp9_priv_surface->frame_height) |
4060 | 4124 | vp9_state->dys_ref_frame_flag &= ~(VP9_LAST_REF); |
4061 | 4125 | } |
4062 | - if (vp9_state->ref_frame_flag & VP9_GOLDEN_REF) { | |
4126 | + if ((vp9_state->ref_frame_flag & VP9_GOLDEN_REF) && | |
4127 | + vp9_state->golden_ref_obj) { | |
4063 | 4128 | obj_surface = vp9_state->golden_ref_obj; |
4064 | 4129 | vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); |
4065 | 4130 |
@@ -4067,7 +4132,8 @@ gen9_encode_vp9_check_parameter(VADriverContextP ctx, | ||
4067 | 4132 | vp9_state->frame_height == vp9_priv_surface->frame_height) |
4068 | 4133 | vp9_state->dys_ref_frame_flag &= ~(VP9_GOLDEN_REF); |
4069 | 4134 | } |
4070 | - if (vp9_state->ref_frame_flag & VP9_ALT_REF) { | |
4135 | + if ((vp9_state->ref_frame_flag & VP9_ALT_REF) && | |
4136 | + vp9_state->alt_ref_obj) { | |
4071 | 4137 | obj_surface = vp9_state->alt_ref_obj; |
4072 | 4138 | vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); |
4073 | 4139 |
@@ -4214,7 +4280,8 @@ gen9_vme_gpe_kernel_prepare_vp9(VADriverContextP ctx, | ||
4214 | 4280 | } |
4215 | 4281 | |
4216 | 4282 | if (vp9_state->dys_ref_frame_flag) { |
4217 | - if (vp9_state->dys_ref_frame_flag & VP9_LAST_REF) { | |
4283 | + if ((vp9_state->dys_ref_frame_flag & VP9_LAST_REF) && | |
4284 | + vp9_state->last_ref_obj) { | |
4218 | 4285 | obj_surface = vp9_state->last_ref_obj; |
4219 | 4286 | surface_param.frame_width = vp9_state->frame_width; |
4220 | 4287 | surface_param.frame_height = vp9_state->frame_height; |
@@ -4225,7 +4292,8 @@ gen9_vme_gpe_kernel_prepare_vp9(VADriverContextP ctx, | ||
4225 | 4292 | if (va_status) |
4226 | 4293 | return va_status; |
4227 | 4294 | } |
4228 | - if (vp9_state->dys_ref_frame_flag & VP9_GOLDEN_REF) { | |
4295 | + if ((vp9_state->dys_ref_frame_flag & VP9_GOLDEN_REF) && | |
4296 | + vp9_state->golden_ref_obj) { | |
4229 | 4297 | obj_surface = vp9_state->golden_ref_obj; |
4230 | 4298 | surface_param.frame_width = vp9_state->frame_width; |
4231 | 4299 | surface_param.frame_height = vp9_state->frame_height; |
@@ -4236,7 +4304,8 @@ gen9_vme_gpe_kernel_prepare_vp9(VADriverContextP ctx, | ||
4236 | 4304 | if (va_status) |
4237 | 4305 | return va_status; |
4238 | 4306 | } |
4239 | - if (vp9_state->dys_ref_frame_flag & VP9_ALT_REF) { | |
4307 | + if ((vp9_state->dys_ref_frame_flag & VP9_ALT_REF) && | |
4308 | + vp9_state->alt_ref_obj) { | |
4240 | 4309 | obj_surface = vp9_state->alt_ref_obj; |
4241 | 4310 | surface_param.frame_width = vp9_state->frame_width; |
4242 | 4311 | surface_param.frame_height = vp9_state->frame_height; |
@@ -4843,6 +4912,9 @@ intel_vp9enc_refresh_frame_internal_buffers(VADriverContextP ctx, | ||
4843 | 4912 | i965_zero_gpe_resource(&pak_context->res_compressed_input_buffer); |
4844 | 4913 | buffer = i965_map_gpe_resource(&pak_context->res_compressed_input_buffer); |
4845 | 4914 | |
4915 | + if (!buffer) | |
4916 | + return; | |
4917 | + | |
4846 | 4918 | /* write tx_size */ |
4847 | 4919 | if ((pic_param->luma_ac_qindex == 0) && |
4848 | 4920 | (pic_param->luma_dc_qindex_delta == 0) && |
@@ -5357,6 +5429,9 @@ intel_vp9enc_construct_pak_insertobj_batchbuffer(VADriverContextP ctx, | ||
5357 | 5429 | uncompressed_header_length = vp9_state->header_length; |
5358 | 5430 | cmd_ptr = i965_map_gpe_resource(obj_batch_buffer); |
5359 | 5431 | |
5432 | + if (!cmd_ptr) | |
5433 | + return; | |
5434 | + | |
5360 | 5435 | bits_in_last_dw = uncompressed_header_length % 4; |
5361 | 5436 | bits_in_last_dw *= 8; |
5362 | 5437 |
@@ -5437,6 +5512,10 @@ gen9_vp9_pak_picture_level(VADriverContextP ctx, | ||
5437 | 5512 | uint8_t *prob_ptr; |
5438 | 5513 | |
5439 | 5514 | prob_ptr = i965_map_gpe_resource(&pak_context->res_prob_buffer); |
5515 | + | |
5516 | + if (!prob_ptr) | |
5517 | + return; | |
5518 | + | |
5440 | 5519 | /* copy the current fc to vp9_prob buffer */ |
5441 | 5520 | memcpy(prob_ptr, &vp9_state->vp9_current_fc, sizeof(FRAME_CONTEXT)); |
5442 | 5521 | if ((pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME) || |
@@ -1908,6 +1908,7 @@ struct gen9_vp9_state { | ||
1908 | 1908 | struct object_surface *alt_ref_obj; |
1909 | 1909 | |
1910 | 1910 | VAEncSequenceParameterBufferVP9 *seq_param; |
1911 | + VAEncSequenceParameterBufferVP9 bogus_seq_param; | |
1911 | 1912 | VAEncPictureParameterBufferVP9 *pic_param; |
1912 | 1913 | VAEncMiscParameterTypeVP9PerSegmantParam *segment_param; |
1913 | 1914 | double brc_init_current_target_buf_full_in_bits; |