GNU Binutils with patches for OS216
リビジョン | 7a8f494c7b171f6cbad20a14ef03a5d7acaa6ccb (tree) |
---|---|
日時 | 2018-03-22 22:22:45 |
作者 | Pedro Franco de Carvalho <pedromfc@linu...> |
コミッター | Pedro Franco de Carvalho |
ppc: Fix stwux and stdux masks in skip_prologue
This patch merges the masks for matching the stwux and stdux
instructions in rs6000-tdep.c:skip_prologue into a single mask that
only matches these two instructions.
Commit 72dd273062 fixed the warning described in PR tdep/18295, this
patch addresses the comment in the same PR indicating that the mask
was too permissive.
gdb/Changelog:
PR tdep/18295
* rs6000-tdep.c (skip_prologue): Match both stwux and stdux
a single mask.
@@ -1,5 +1,11 @@ | ||
1 | 1 | 2018-03-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> |
2 | 2 | |
3 | + PR tdep/18295 | |
4 | + * rs6000-tdep.c (skip_prologue): Match both stwux and stdux | |
5 | + a single mask. | |
6 | + | |
7 | +2018-03-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> | |
8 | + | |
3 | 9 | * rs6000-tdep.c (store_insn_p): New function. |
4 | 10 | (skip_prologue): New variable alloca_reg_offset. Set lr_reg |
5 | 11 | and cr_reg to their unshifted values. Use store_insn_p to |
@@ -1889,8 +1889,8 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc, | ||
1889 | 1889 | offset = fdata->offset; |
1890 | 1890 | continue; |
1891 | 1891 | } |
1892 | - else if ((op & 0xfc1f016e) == 0x7c01016e) | |
1893 | - { /* stwux rX,r1,rY */ | |
1892 | + else if ((op & 0xfc1f07fa) == 0x7c01016a) | |
1893 | + { /* stwux rX,r1,rY || stdux rX,r1,rY */ | |
1894 | 1894 | /* No way to figure out what r1 is going to be. */ |
1895 | 1895 | fdata->frameless = 0; |
1896 | 1896 | offset = fdata->offset; |
@@ -1903,13 +1903,6 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc, | ||
1903 | 1903 | offset = fdata->offset; |
1904 | 1904 | continue; |
1905 | 1905 | } |
1906 | - else if ((op & 0xfc1f016a) == 0x7c01016a) | |
1907 | - { /* stdux rX,r1,rY */ | |
1908 | - /* No way to figure out what r1 is going to be. */ | |
1909 | - fdata->frameless = 0; | |
1910 | - offset = fdata->offset; | |
1911 | - continue; | |
1912 | - } | |
1913 | 1906 | else if ((op & 0xffff0000) == 0x38210000) |
1914 | 1907 | { /* addi r1,r1,SIMM */ |
1915 | 1908 | fdata->frameless = 0; |