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old-svn-converted: コミット


コミットメタ情報

リビジョン86d28d7a5a4f5b6487a8fccc68cf1e30eea4b392 (tree)
日時2014-03-21 20:10:01
作者naruko <naruko@24ea...>
コミッターnaruko

ログメッセージ

namco 108系を追加, bandai の fcg3系名称を lz93d50 に変更

git-svn-id: svn+ssh://svn.osdn.net/svnroot/unagi@417 24ea1065-a21e-4ca1-99c9-f5125deb0858

変更サマリ

差分

--- a/client/trunk/anago/bandai_karaoke.ad
+++ b/client/trunk/anago/bandai_karaoke.ad
@@ -7,6 +7,10 @@ board <- {
77 size_base = 1 * mega, size_max = 4 * mega,
88 banksize = 0x4000
99 },
10+ cpu_ram = {
11+ size_base = 0x400, size_max = 0x400,
12+ banksize = 0x400
13+ },
1014 ppu_rom = {
1115 size_base = 0, size_max = 0,
1216 banksize = 0x2000
@@ -44,3 +48,14 @@ write register の順番から見ると変。
4448 }
4549 }
4650 }
51+
52+function cpu_ram_access(d, pagesize, banksize)
53+{
54+ cpu_write(d, 0xc008, [0x08,0x09]);
55+ cpu_ramrw(d, 0xf000, 1);
56+ cpu_ramrw(d, 0x8000, 1);
57+ cpu_write(d, 0xc04a, [0x4a,0x4b]);
58+ cpu_ramrw(d, 0x8000, 1);
59+ cpu_ramrw(d, 0x6000, banksize - 3);
60+}
61+
--- /dev/null
+++ b/client/trunk/anago/bandai_lz93d50_jump2.ae
@@ -0,0 +1,35 @@
1+//Famicom Jump II
2+board <- {
3+ mappernum = 153, vram_mirrorfind = false, ppu_ramfind = false,
4+ cpu_rom = {
5+ size_base = 4 * mega, size_max = 4 * mega,
6+ banksize = 0x4000
7+ },
8+ cpu_ram = {
9+ size_base = 0x2000, size_max = 0x2000, banksize = 0x2000
10+ }
11+ ppu_rom = {
12+ size_base = 0, size_max = 0,
13+ banksize = 0x2000
14+ }
15+};
16+
17+function cpu_dump(d, pagesize, banksize)
18+{
19+ for(local i = 0; i < pagesize; i += 0x10){
20+ local v = i >> 4
21+ cpu_write(d, 0x8000, [v, v, v, v]);
22+ for(local j = 0; j < 0x10 - 1; j += 1){
23+ cpu_write(d, 0x8008, j);
24+ cpu_read(d, 0x8000, banksize);
25+ }
26+ cpu_read(d, 0xc000, banksize);
27+ }
28+}
29+
30+function cpu_ram_access(d, pagesize, banksize)
31+{
32+ cpu_write(d, 0x800d, 1 << 5);
33+ cpu_ramrw(d, 0x6000, banksize);
34+ cpu_write(d, 0x800d, 0);
35+}
--- a/client/trunk/anago/bandai_fcg3_x24c01.ag
+++ b/client/trunk/anago/bandai_lz93d50_x24c01.ag
@@ -1,95 +1,95 @@
1-/*
2-BANDAI FCG-3 + X24C01 style cartridge
3-
4-SDガンダム外伝 ナイトガンダム物語
5- 1990-08-11 B50EEP, LZ93D50+X24C01
6-ドラゴンボールZ 強襲！サイヤ人
7- 1990-10-27 DRAGON BALLZ, LZ93D50+X24C01
8-まじかる☆タルるートくん ファンタスティックワールド
9- 1991-03-21 DRAGON BALLZ-B, LZ93D50+X24C01
10-まじかる☆タルるートくん2
11- 1992-06-19 DRAGON BALLZ-B, LZ93D50+X24C01 ← 24C02 ではない
12-*/
13-board <- {
14- mappernum = 16,
15- cpu_rom = {
16- size_base = 2 * mega, size_max = 2 * mega,
17- banksize = 0x4000
18- },
19- cpu_ram = {
20- size_base = 0x0080, size_max = 0x0080,
21- banksize = 0x0080
22- },
23- ppu_rom = {
24- size_base = 1 * mega, size_max = 2 * mega,
25- banksize = 0x0400
26- },
27- ppu_ramfind = false,
28- vram_mirrorfind = false
29-};
30-
31-const register_offset = 0x8000;
32-dofile("fcg3.ai");
33-
34-/*
35-=====================
36-X24C01 frame sequence
37-=====================
38-<START>[EEPROM address+RW]<A-ACK>[data]<D-ACK><STOP>
39-
40-<> is 1bit, [] is 8bit, A-ACK is address acknowledge,
41-D-ACK is data acknowledge, R is 1, W is 0
42-
43-8bit data send MSB to LSB (bit7 to bit0)
44-Dragon Ball Z1's program send address LSB to MSB (bug).
45-
46-slave address does not exist.
47-
48---current address read--
49-<START>[EEPROM address,R]<A-ACK>[EEPROM data]<D-ACK><STOP>
50-
51---sequenctial read--
52-<START>[EEPROM address,R]<A-ACK>|[EEPROM data]<D-ACK>|<STOP>
53- |<- loop any times ->|
54-
55---page write---
56-|<START>[EEPROM address,W]<A-ACK>|[EEPROM data]<D-ACK>|<STOP>
57-|<- loop A-ACK is H ->|<- loop 1to4times ->|
58-*/
59-
60-function cpu_ram_access(d, pagesize, banksize)
61-{
62- local I2C_WRITE = I2C_SEND_L;
63- local I2C_READ = I2C_SEND_H;
64-
65- if(mode_is_read(d) == true){
66- //sequential read
67- i2c_address_set(d, 0, I2C_READ);
68- for(local i = 0; i < pagesize * banksize; i++){
69- for(local bit = 0; bit < 8; bit++){
70- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);
71- cpu_write(d, 0x800d, I2C_DIR_READ | I2C_CLOCK_H | I2C_SEND_H);
72- cpu_read_bit_msb(d, 0x6000, 4);
73- }
74- //send ack
75- send_bit(d, I2C_SEND_L);
76- }
77- i2c_stop(d);
78- }else{
79- //page write (4byte)
80- for(local i = 0; i < pagesize * banksize; i+=4){
81- i2c_address_set(d, i, I2C_WRITE);
82- for(local j = 0; j < 4; j++){
83- for(local bit = 0; bit < 8; bit++){
84- local n = I2C_SEND_L;
85- if(cpu_fetch_bit_msb(d) != 0){
86- n = I2C_SEND_H;
87- }
88- send_bit(d, n);
89- }
90- i2c_ack_wait(d);
91- }
92- i2c_stop(d);
93- }
94- }
95-}
1+/*
2+BANDAI FCG-3 + X24C01 style cartridge
3+
4+SDガンダム外伝 ナイトガンダム物語
5+ 1990-08-11 B50EEP, LZ93D50+X24C01
6+ドラゴンボールZ 強襲！サイヤ人
7+ 1990-10-27 DRAGON BALLZ, LZ93D50+X24C01
8+まじかる☆タルるートくん ファンタスティックワールド
9+ 1991-03-21 DRAGON BALLZ-B, LZ93D50+X24C01
10+まじかる☆タルるートくん2
11+ 1992-06-19 DRAGON BALLZ-B, LZ93D50+X24C01 ← 24C02 ではない
12+*/
13+board <- {
14+ mappernum = 16,
15+ cpu_rom = {
16+ size_base = 2 * mega, size_max = 2 * mega,
17+ banksize = 0x4000
18+ },
19+ cpu_ram = {
20+ size_base = 0x0080, size_max = 0x0080,
21+ banksize = 0x0080
22+ },
23+ ppu_rom = {
24+ size_base = 1 * mega, size_max = 2 * mega,
25+ banksize = 0x0400
26+ },
27+ ppu_ramfind = false,
28+ vram_mirrorfind = false
29+};
30+
31+const register_offset = 0x8000;
32+dofile("lz93d50.ai");
33+
34+/*
35+=====================
36+X24C01 frame sequence
37+=====================
38+<START>[EEPROM address+RW]<A-ACK>[data]<D-ACK><STOP>
39+
40+<> is 1bit, [] is 8bit, A-ACK is address acknowledge,
41+D-ACK is data acknowledge, R is 1, W is 0
42+
43+8bit data send MSB to LSB (bit7 to bit0)
44+Dragon Ball Z1's program send address LSB to MSB (bug).
45+
46+slave address does not exist.
47+
48+--current address read--
49+<START>[EEPROM address,R]<A-ACK>[EEPROM data]<D-ACK><STOP>
50+
51+--sequenctial read--
52+<START>[EEPROM address,R]<A-ACK>|[EEPROM data]<D-ACK>|<STOP>
53+ |<- loop any times ->|
54+
55+--page write---
56+|<START>[EEPROM address,W]<A-ACK>|[EEPROM data]<D-ACK>|<STOP>
57+|<- loop A-ACK is H ->|<- loop 1to4times ->|
58+*/
59+
60+function cpu_ram_access(d, pagesize, banksize)
61+{
62+ local I2C_WRITE = I2C_SEND_L;
63+ local I2C_READ = I2C_SEND_H;
64+
65+ if(mode_is_read(d) == true){
66+ //sequential read
67+ i2c_address_set(d, 0, I2C_READ);
68+ for(local i = 0; i < pagesize * banksize; i++){
69+ for(local bit = 0; bit < 8; bit++){
70+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);
71+ cpu_write(d, 0x800d, I2C_DIR_READ | I2C_CLOCK_H | I2C_SEND_H);
72+ cpu_read_bit_msb(d, 0x6000, 4);
73+ }
74+ //send ack
75+ send_bit(d, I2C_SEND_L);
76+ }
77+ i2c_stop(d);
78+ }else{
79+ //page write (4byte)
80+ for(local i = 0; i < pagesize * banksize; i+=4){
81+ i2c_address_set(d, i, I2C_WRITE);
82+ for(local j = 0; j < 4; j++){
83+ for(local bit = 0; bit < 8; bit++){
84+ local n = I2C_SEND_L;
85+ if(cpu_fetch_bit_msb(d) != 0){
86+ n = I2C_SEND_H;
87+ }
88+ send_bit(d, n);
89+ }
90+ i2c_ack_wait(d);
91+ }
92+ i2c_stop(d);
93+ }
94+ }
95+}
--- a/client/trunk/anago/bandai_fcg3_x24c02.ag
+++ b/client/trunk/anago/bandai_lz93d50_x24c02.ag
@@ -33,7 +33,7 @@ board <- {
3333 };
3434
3535 const register_offset = 0x8000;
36-dofile("fcg3.ai")
36+dofile("lz93d50.ai")
3737 /*
3838 =====================
3939 X24C02 frame sequence
--- /dev/null
+++ b/client/trunk/anago/namcot_108_3433.ad
@@ -0,0 +1,44 @@
1+/*
2+Namcot 118/119 chip with Charcter ROM A16 wired PPU A12
3+
4+Quinty
5+*/
6+board <- {
7+ mappernum = 88, vram_mirrorfind = true, ppu_ramfind = false,
8+ cpu_rom = {
9+ size_base = 0x10000, size_max = 1*mega,
10+ banksize = 0x2000
11+ },
12+ cpu_ram = {
13+ size_base = 0, size_max = 0, banksize = 0
14+ }
15+ ppu_rom = {
16+ size_base = 0x20000, size_max = 0x20000,
17+ banksize = 0x0400
18+ }
19+};
20+
21+function cpu_dump(d, pagesize, banksize)
22+{
23+ for(local i = 0; i < pagesize - 2; i += 2){
24+ cpu_write(d, 0x8000, [6, i, 7, i+1]);
25+ cpu_read(d, 0x8000, banksize * 2);
26+ }
27+ cpu_read(d, 0xc000, banksize * 2);
28+}
29+
30+function ppu_dump(d, pagesize, banksize)
31+{
32+ local i;
33+ //ROM offset 0x00000-0x0ffff can access from PPU address 0x0000-0x0fff
34+ for(i = 0; i < (pagesize >> 1); i += 4){
35+ cpu_write(d, 0x8000, [0, i, 1, i+2]);
36+ ppu_read(d, 0x0000, banksize * 4);
37+ }
38+
39+ //ROM offset 0x10000-0x1ffff can access from PPU address 0x1000-0x1fff
40+ for(; i < pagesize; i += 4){
41+ cpu_write(d, 0x8000, [2, i, 3, i+1, 4, i+2, 5, i+3]);
42+ ppu_read(d, 0x1000, banksize * 4);
43+ }
44+}
--- /dev/null
+++ b/client/trunk/anago/namcot_108_34xx_nintendo_derom.ad
@@ -0,0 +1,47 @@
1+/*
2+Namcot 108/109/118/119 chip with generic wiring.
3+PCB 3401/34[01]5/34[01]6/34[01]7/3451/3413/3414
4+ NES-DEROM/DE1ROM/DRROM
5+
6+この IC は MMC3 より先に登場し、 MMC3 に仕様が似ている。
7+仕様が似ている点で,古いエミュレータでは mapper 4 と定義されている。
8+
9+古くて曖昧な仕様は Namco IC と MMC3 との明確な区別が再定義され、 mapper
10+番号も 206 へ分離された。それにも関わらず Namco のゲームは MMC3
11+(mapper 4)という認識と古い ROM image が消えないのはユーザーにとって
12+たいした違いがないからだ。
13+
14+NAMCOT-MC, NAMCOT-SX で動作確認済み
15+*/
16+
17+board <- {
18+ mappernum = 206, vram_mirrorfind = true, ppu_ramfind = false,
19+ cpu_rom = {
20+ size_base = 0x10000, size_max = 1*mega,
21+ banksize = 0x2000
22+ },
23+ cpu_ram = {
24+ size_base = 0, size_max = 0, banksize = 0
25+ }
26+ ppu_rom = {
27+ size_base = 0x8000, size_max = 0x10000,
28+ banksize = 0x0400
29+ }
30+};
31+function cpu_dump(d, pagesize, banksize)
32+{
33+ for(local i = 0; i < pagesize - 2; i += 2){
34+ cpu_write(d, 0x8000, [6, i, 7, i+1]);
35+ cpu_read(d, 0x8000, banksize * 2);
36+ }
37+ cpu_read(d, 0xc000, banksize * 2);
38+}
39+
40+function ppu_dump(d, pagesize, banksize)
41+{
42+ for(local i = 0; i < pagesize; i += 8){
43+ cpu_write(d, 0x8000, [0, i, 1, i+2]);
44+ cpu_write(d, 0x8000, [2, i+4, 3, i+5, 4, i+6, 5, i+7]);
45+ ppu_read(d, 0x0000, banksize * 8);
46+ }
47+}
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