Incorrect alignment of SIMD vectors returned by value from functions
I thought, that force-inlining all functions which return a SIMD vector would be the solution, but I was wrong. The same issue reveals when storing a SIMD vector in a local variable. Here is the disassembly of such SIGSEGV crash:
0x00000000005520db <+101>: vmovdqa ymm0,ymm1 => 0x00000000005520df <+105>: vmovdqa YMMWORD PTR [rbp-0x40],ymm0 ... (gdb) p $rbp $1 = (void *) 0xf7a750 (gdb) p $rbp-0x40 $2 = (void *) 0xf7a710
The local variable's address 0xf7a710 is not properly aligned to 32 bytes, so vmovdqa crashes.
This was compiled with -O0. When compiled with -O3, it doesn't crash, probably because it keeps all computations in registers and doesn't store intermediate results in local variables at all. However, there are cases when storing vector registers to local variables is inevitable.
keith Thank you for your report, but may I ask why you have raised the issue here? You are using a (trademark-infringing) x86_64-w64-mingw32 GCC compiler suite, (which, in spite of its anomalous mingw32 host identification, appears to generate 64-bit code); this compiler suite appears to originate from the MSYS2 project, which is not, in any way, associated with the MinGW Project, (the legitimate owner of the MinGW trademark). Consequently, I am inclined to close this, as an "invalid" ticket.
Before I do close it, however, I will offer the following comments:
Fork$ mingw32-g++ -S -O0 -DARRAY_SIZE=32 -o- -masm=intel -mavx2 main.cc | grep -v cfi | less -FX
...
.text
.globl __Z16crash_vector_retPh
.def __Z16crash_vector_retPh; .scl 2; .type 32; .endef
__Z16crash_vector_retPh:
LFB5437:
push ebp
mov ebp, esp
and esp, -32
sub esp, 64
mov eax, DWORD PTR [ebp+8]
mov DWORD PTR [esp+28], eax
mov eax, DWORD PTR [esp+28]
vmovdqu xmm0, XMMWORD PTR [eax]
vinserti128 ymm0, ymm0, XMMWORD PTR [eax+16], 0x1
vmovdqa YMMWORD PTR [esp+32], ymm0
vmovdqa ymm0, YMMWORD PTR [esp+32]
leave
ret
Ignoring that this is 32-bit assembly, (and if I actually try to run it, it crashes, not with the SIGSEGV you report, but with a SIGILL "illegal instruction" exception), do note the additional:
and esp, -32instruction, at the beginning of the local stack frame set-up, for which no corresponding instruction appears in your GDB disassembly: this ensures that the local frame itself, and thus any variable addressed at a 32-byte offset within it, will be correctly aligned on a 32-byte boundary.
$ g++ -S -O0 -DARRAY_SIZE=32 -o- -masm=intel -mavx2 main.cc | grep -v cfi | less -FX
...
.text
.size _ZlsRSoRKDv4_x, .-_ZlsRSoRKDv4_x
.globl _Z16crash_vector_retPh
.type _Z16crash_vector_retPh, @function
_Z16crash_vector_retPh:
.LFB5667:
push rbp
mov rbp, rsp
and rsp, -32
mov QWORD PTR -56[rsp], rdi
mov rax, QWORD PTR -56[rsp]
mov QWORD PTR -40[rsp], rax
mov rax, QWORD PTR -40[rsp]
vmovdqu xmm0, XMMWORD PTR [rax]
vinserti128 ymm0, ymm0, XMMWORD PTR 16[rax], 0x1
vmovdqa YMMWORD PTR -32[rsp], ymm0
vmovdqa ymm0, YMMWORD PTR -32[rsp]
leave
ret
Obviously, this is now 64-bit Linux-native code, but it too has that corresponding:
and rsp, -32instruction, to achieve the required stack frame alignment. (Alas, if I try to run this, it too crashes with a SIGILL exception, on the first vmovdqu instruction; I guess the Intel Celeron N4000 64-bit processor, in my laptop, either doesn't support the AVX2 instructions, or they are disabled in the firmware configuration).
Thanks a lot for your answer, @keith, and for testing it on linux in the cross-compile mode. I wasn't aware of any trademark issues between MinGW and MSYS2. I'm sorry to hear that. I thought that msys2 includes the mingw gcc compiler package just like it includes other open source packages. I know that they apply some patches on top of MinGW, but I thought that this kind of bug is so low level that it has to be directly in MinGW sources, not in msys2 patches. Eventually, it seems this bug is msys2 specific. Anyway, I like your idea of cross-compiling on linux for windows. Thanks, you can close this issue.
Summary of the Issue
Working with AVX2 SIMD vectors. When a __m256i value is returned from a function, the SIMD register ymm0 is copied to memory using the aligned move instruction vmovdqa, so the destination memory address must be aligned to 32 bytes. This requirement is not met in my test case and the program crashes with SIGSEGV. More info follows in the "Minimal Test Case" section below.
I tested it also on Ubuntu's gcc, but it didn't crash there, neither did with clang++ on Windows and Ubuntu, so therefore I am submitting this issue to the MinGW tracker. But I might be wrong and the issue may exist in gcc as well.
Host Operating System Information and Version
Windows 10 Home, Version 10.0.17134 Build 17134
with latest updated MSYS2.
GCC Version
Binutils Version
MinGW Version
I don't know what should I look for in the mingw/include/_mingw.h file.
Build Environment
Minimal Self-Contained Test Case
main.cpp:
Makefile:
Trying various compilation options:
$ make test for COMPILER in g++; do \ ASM_FLAGS="-S -fverbose-asm -masm=intel"; \ for ARRAY_SIZE in 32 36; do \ for OPT in 0 1 2 3; do \ NAME="main_O${OPT}_${COMPILER}_s${ARRAY_SIZE}"; \ echo "--------------------------------------------------"; \ echo "NAME:${NAME}"; \ rm -f ${NAME}.exe; \ ${COMPILER} -mavx2 -std=c++17 -g -DARRAY_SIZE=${ARRAY_SIZE} -O${OPT} -o ${NAME}.exe main.cpp; \ ${COMPILER} -mavx2 -std=c++17 -g -DARRAY_SIZE=${ARRAY_SIZE} -O${OPT} ${ASM_FLAGS} -o ${NAME}.s main.cpp; \ ./${NAME}.exe; \ done; \ done; \ done -------------------------------------------------- NAME:main_O0_g++_s32 alignof(__m256i): 32 /bin/sh: line 3: 15627 Segmentation fault ./${NAME}.exe -------------------------------------------------- NAME:main_O1_g++_s32 alignof(__m256i): 32 /bin/sh: line 3: 15631 Segmentation fault ./${NAME}.exe -------------------------------------------------- NAME:main_O2_g++_s32 alignof(__m256i): 32 /bin/sh: line 3: 15635 Segmentation fault ./${NAME}.exe -------------------------------------------------- NAME:main_O3_g++_s32 alignof(__m256i): 32 /bin/sh: line 3: 15639 Segmentation fault ./${NAME}.exe -------------------------------------------------- NAME:main_O0_g++_s36 alignof(__m256i): 32 /bin/sh: line 3: 15643 Segmentation fault ./${NAME}.exe -------------------------------------------------- NAME:main_O1_g++_s36 alignof(__m256i): 32 vr: [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31] -------------------------------------------------- NAME:main_O2_g++_s36 alignof(__m256i): 32 vr: [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31] -------------------------------------------------- NAME:main_O3_g++_s36 alignof(__m256i): 32 vr: [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31]GDB session
Program compiled by
g++ -mavx2 -std=c++17 -g -DARRAY_SIZE=32 -O0 -o main_O0_g++_s32.exe main.cpp
$ gdb main_O0_g++_s32 GNU gdb (GDB) 8.3 Copyright (C) 2019 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "x86_64-w64-mingw32". Type "show configuration" for configuration details. For bug reporting instructions, please see: <http://www.gnu.org/software/gdb/bugs/>. Find the GDB manual and other documentation resources online at: <http://www.gnu.org/software/gdb/documentation/>. For help, type "help". Type "apropos word" to search for commands related to "word"... Reading symbols from main_O0_g++_s32... (gdb) r Starting program: D:\SourceCode\cpp_simdpp_crash_loadu\main_O0_g++_s32.exe [New Thread 10112.0x4c8] [New Thread 10112.0x409c] [New Thread 10112.0x6bf0] alignof(__m256i): 32 Thread 1 received signal SIGSEGV, Segmentation fault. 0x00000000004016ea in crash_vector_ret (a=0x66fe10 "") at main.cpp:24 24 v = _mm256_loadu_si256(reinterpret_cast<const __m256i*>(a)); (gdb) bt #0 0x00000000004016ea in crash_vector_ret (a=0x66fe10 "") at main.cpp:24 #1 0x000000000040179f in main (argc=1, argv=0xe64a60) at main.cpp:40 (gdb) set disassembly-flavor intel (gdb) disas Dump of assembler code for function crash_vector_ret(unsigned char*): 0x00000000004016b7 <+0>: push rbp 0x00000000004016b8 <+1>: mov rbp,rsp 0x00000000004016bb <+4>: sub rsp,0x10 0x00000000004016bf <+8>: mov QWORD PTR [rbp+0x10],rcx 0x00000000004016c3 <+12>: mov QWORD PTR [rbp+0x18],rdx 0x00000000004016c7 <+16>: mov rax,QWORD PTR [rbp+0x18] 0x00000000004016cb <+20>: mov QWORD PTR [rbp-0x8],rax 0x00000000004016cf <+24>: mov rax,QWORD PTR [rbp-0x8] 0x00000000004016d3 <+28>: vmovdqu xmm0,XMMWORD PTR [rax] 0x00000000004016d7 <+32>: vinserti128 ymm0,ymm0,XMMWORD PTR [rax+0x10],0x1 0x00000000004016de <+39>: vmovdqa ymm1,ymm0 0x00000000004016e2 <+43>: vmovdqa ymm0,ymm1 0x00000000004016e6 <+47>: mov rax,QWORD PTR [rbp+0x10] => 0x00000000004016ea <+51>: vmovdqa YMMWORD PTR [rax],ymm0 0x00000000004016ee <+55>: nop 0x00000000004016ef <+56>: mov rax,QWORD PTR [rbp+0x10] 0x00000000004016f3 <+60>: add rsp,0x10 0x00000000004016f7 <+64>: pop rbp 0x00000000004016f8 <+65>: ret End of assembler dump. (gdb) p $rax $1 = 6749616 (gdb) p $rax/32*32 $2 = 6749600As you can see, the $rax address is not aligned to 32 bytes and therefore the vmovdqa crashes.
I thought that because of the alignof(__m256i) == 32, the compiler should guarantee that also the return value is aligned to 32 bytes.
I might be wrong. Could you please shed more light on this issue?
Thanks for any hints.